ASSEMBLY CODE CONVERSION THROUGH PATTERN MAPPING BETWEEN TWO VLIW DSP PROCESSORS: A CASE STUDY Bogong Su 1 Jian Wang 2 Erh-Wen Hu 1 Joseph Manzano 1 sub@wpunj.edu jiwang@nortelnetworks.com hue@wpunj.edu manzanoj@student.wpunj.edu 1 Dept. of Computer Science, The William Paterson University of New Jersey, Wayne, NJ 07470, USA 2 Wireless Speech and Data Processing, Nortel Networks, Montreal, QC, Canada, H3E 1H6 Abstract In this paper, we investigate a new pattern mapping method to convert the assembly code between two VLIW digital signal processors. The method is so named because the pattern of the code is kept unchanged during the conversion process in order to manage complexity. As a case study, we first manually convert the assembly code of a typical DSP application from Texas Instruments' TIC62, the source processor, to a high level intermediate code. We then feed the intermediate code to the SC140 compiler backend to generate the assembly code of the target SC140 processor, which is executed on the SC140 simulator. The result thus obtained compares favorably with that obtained directly by compiling and executing the C code on the SC140 system in terms of both validity and total execution cycles. 1. Introduction Digital signal processing industry has been growing rapidly over the past few years [1]. Due to the constant need to improve the performance and to address a wide range of applications, the manufacturers of digital signal processors have introduced a variety of processors of different designs over the years. Recently, a new breed of processors based on VLIW architecture has become mainstream. How to take advantage of these newer and more powerful processors by migrating existing code to these processors in a timely manner has become a problem of practical importance. Although binary code conversion between general-purpose processors has been investigated [2, 3, 4], few work has been done for code conversion between digital signal processors [5]. We have proposed an approach to convert the assembly code of traditional DSP processor to VLIW DSP processor [6]. In this paper, we are motivated to investigate the code conversion at assembly level between two different VLIW processors for the following considerations. Despite recent progress in compiler technologies, much of the application code is still handcrafted and optimized at assembler level. Besides, as more and more VLIW DSP processors are available, code conversion between VLIW DSP processors becomes a new challenge. In the following section, we present our code conversion method. 2. Code Conversion Method In this section, we will present our pattern matching code conversion method that converts the optimized assembly code between two VLIW DSP processors. 2.1 Pattern Before we define the concept of pattern, we describe some important definitions. Basic Instructions and VLIW Instructions - A basic instruction is the instruction that performs only one operation such as addition, multiplication, memory load or store, register data transfer, and in some case, we also consider MAC as a basic instruction. A VLIW instruction is a group of basic instructions that can be issued for execution at the same time. In this paper, when we say instructions without putting VLIW in the front, we imply they are basic instructions. Basic Block and Control Flow Graph - A basic block is an instruction sequence that has only one entry and one exit. We use a directed graph to represent the control flow of a program, which is called a control flow graph. The control flow graph consists of all basic blocks of a program as its nodes and directed edges that specify the execution order of the basic blocks. Pattern is defined as a control flow graph and a mapping function from each instruction to the node set of the graph. Formally, given a program P, its pattern is defined as (G,B), where G is the control flow graph of P and each node of G denotes a basic block, B is a mapping function - for each instruction I of P, B(I) is the basic block where I belongs to. Pattern is not a schedule of a program. It doesn't give the information about which instructions will be executed in parallel, or about when an instruction will be issued for execution. But it gives the information about the control flow of a program and about which instructions are grouped into the same basic block.