IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 18, NO. 10, OCTOBER 2008 701 A 0.6–2.7 GHz Semidynamic Frequency Divide-by-3 Utilizing Wideband RC Polyphase Filter in 0.18 m CMOS Seungsoo Kim, Student Member, IEEE, and Hyunchol Shin, Member, IEEE Abstract—A wideband complementary metal–oxide semicon- ductor (CMOS) semidynamic frequency divide-by-3 covering more than two octave bandwidths is presented. The wideband operation without requiring a quadrature signal source is realized by employing a three-stage RC polyphase filter. The transfer function analysis on Type-II two- and three-stage polyphase filters is performed to provide analytic solutions of the peak phase error and peak attenuation. Implemented in 0.18 m CMOS, the divide-by-3 operates over the input frequency range between 0.6 and 2.7 GHz while dissipating 15 mA from a 1.8 V supply. Index Terms—Dynamic frequency divider, polyphase filter. I. INTRODUCTION T HE DYNAMIC divider, also known as the Miller divider [1], is generally known to be more suitable for high-fre- quency operation and low-power dissipation than the conven- tional flip-flop-based static dividers. However, the division ratio of the Miller divider is usually constrained to an integer number. On the other hand, the semidynamic frequency divider is ca- pable of providing a fractional division ratio. Fig. 1 shows the general architecture of the semidynamic divider. It is formed by adding a static divide-by- into the dynamic divider’s feedback or feedforward paths. The single-sideband (SSB) mixer is used to choose only an SSB from a double-sideband output signal of the mixer. When the feedback-path divider is enabled, the output frequency becomes and for the lower- and upper-sideband mixing, respectively. When the feedforward path divider is enabled, becomes and for lower- and upper-sideband mixing, respectively. Therefore, it is very versatile in creating a fractional division ratio. Many semidynamic dividers have been reported in the literature. However, most of them required a quadrature signal source as their input for driving the SSB mixer, and their operating bandwidths were relatively narrow [1]–[4]. To extend the operating bandwidth, we employed a tunable single-stage RC polyphase filter and demonstrated an octave bandwidth semidynamic divide-by-1.5 using gallium- indium-phosphide/gallium-arsenide (GaInP/GaAs) heterojunc- tion bipolar transistor technology [5]. Manuscript received March 27, 2008; revised May 26, 2008. Current version published October 8, 2008. This work was supported in part by the IT Re- search Center Program (IITA-2008-C1090-0801-0038) and the Midium-Term Strategic Technology Development Program of the Ministry of Knowledge Economy, and in part by the Seoul R&DB Program. The authors are with the Department of Radio Science and Engineering, Kwangwoon University, Seoul 139-701, Korea (e-mail: hshin@kw.ac.kr). Digital Object Identifier 10.1109/LMWC.2008.2003478 Fig. 1. General architecture of the semidynamic frequency divider. Fig. 2. Wideband semidynamic divide-by-3 circuit. In this letter, we present a very wideband design of a comple- mentary metal–oxide semiconductor (CMOS) semidynamic di- vide-by-3 by employing a wideband three-stage RC polyphase filter. It does not require a quadrature signal source at the input and operates over two octave bandwidths. II. CIRCUIT DESIGN Fig. 2 shows the simplified block diagram of the semidynamic divide-by-3. A single-phase single-ended input signal is fed to a single-to-differential converter and subsequently converted to a quadrature signal through a three-stage RC polyphase filter. The SSB mixer with a static divide-by-2 in the feedback path is set to choose a lower sideband, thus the division ratio is 1.5. After the divide-by-1.5, the signal passes through an additional static divide-by-2 so that the final division ratio becomes 3. The two static dividers are designed in conventional current- mode logic type. The resistive load is adopted for wideband op- eration. With the tail current of 0.9 mA and the load resistance of 740 , the static divider shows successful operation up to 9.1 GHz and the self-oscillation frequency of 3.6 GHz in post- layout simulation. The SSB mixer is designed in a conventional Gilbert cell type with a resistive load also for wideband opera- tion. The tail current and load resistance of the mixer are set to 1.8 mA and 740 , respectively. With the sufficient wideband design of the mixer and static di- vider as described before, the operating bandwidth of the overall divider is now limited by the SSB mixing operation. Noting that most of the previous dividers required a quadrature VCO as their input signal [1]–[4], we decide to exclude the necessity of the quadrature input signal by including a wideband quadrature generation block at the SSB mixer input. The sequence asym- metric RC polyphase filter is considered to be a good choice for this purpose. 1531-1309/$25.00 © 2008 IEEE Authorized licensed use limited to: Kwangwoon University. Downloaded on October 7, 2008 at 19:57 from IEEE Xplore. Restrictions apply.