Sensors and Actuators A 105 (2003) 261–270 CMOS-compatible position-sensitive devices (PSDs) based on photodetector arrays Anssi Mäkynen a,∗ , Tarmo Ruotsalainen b , Timo Rahkonen a , Juha Kostamovaara a a Department of Electrical and Information Engineering, University of Oulu, FIN-90014 Oulu, Finland b Nokia Mobile Phones, FIN-90571 Oulu, Finland Received 23 April 2002; received in revised form 4 March 2003; accepted 15 March 2003 Abstract This paper reports five different constructions of optical position-sensitive devices (PSDs) implemented using standard CMOS technol- ogy. It is found that despite the non-idealities of CMOS-compatible photodetectors, CMOS technology provides a means of implementing PSDs with relatively high performance. This can be achieved, for example, by using an array of discrete photodetectors instead of the continuous single element structure used in conventional lateral effect PSDs (LEPs). The results show that, relative to a conventional LEP manufactured with dedicated technology, the linearity of an array-type two-axis CMOS PSD can be two to eight times better, and that its precision in low bandwidth (<10 kHz) applications can be 1.4 to 40 times better. © 2003 Elsevier B.V. All rights reserved. Keywords: Position-sensitive device; CMOS; Photodetector array; Lateral effect photodiode 1. Introduction A position-sensitive device (PSD) is a photodetector capa- ble of measuring the centroid position of a light spot falling on its surface. The same task can, of course, be performed by an imaging detector such as a CCD, but PSDs are typically favoured in high-volume applications where simple signal processing, high speed, robustness and low cost are of impor- tance. Such applications include various triangulation-based distance sensors used in many industrial measurement tasks and consumer products such as compact cameras. The most commonly used PSD is the lateral effect PSD (LEP). Despite dedicated and carefully optimised technol- ogy, the position sensing accuracy and sensitivity of LEPs are poorer than those of photodetector arrays such as CCDs. This is mainly due to the continuous single element structure of the conventional LEPs, whose implementation sets very high demands to the quality of the manufacturing technol- ogy in case high accuracy and sensitivity are desired. The purpose of this paper is to demonstrate, that the performance of LEPs can be improved by replacing the large single ele- ment photodetector with an array of discrete photodetectors and that such PSDs can be successfully implemented using standard CMOS technology. ∗ Corresponding author. Tel.: +358-855-32700; fax: +358-855-32676. E-mail address: anssi@ees2.oulu.fi (A. Mäkynen). The main goal of this work was to implement two-axis CMOS PSDs with good accuracy and incremental sensitiv- ity. The devices were originally intended for sensor systems used outdoors where background illumination and the ef- fect of atmospheric turbulence must be taken into account [5,6]. Modulated illumination of a few kHz is typically used in such cases to optimise noise performance and to prevent the background illumination from affecting measurement re- sults. The effect of turbulence on measurement precision is reduced by using a small spot size on the detector. Implementing PSDs using common CMOS technology instead of dedicated photodetector processes has two poten- tial advantages: first, the compactness of the sensor can be improved by implementing all the electronics and the de- tector on a single chip and secondly, the sensor’s overall performance may be improved using special PSD structures not realisable in conventional photodetector processes. The obvious drawback of CMOS technology is that it is not de- signed for light detection and thus does not provide best pos- sible performance in that sense. However, our experiments show that despite the non-idealities of CMOS-compatible photodetectors, CMOS technology offers a possibility of im- plementing relatively high-performance PSDs. This paper reports five different CMOS PSD construc- tions. These PSDs were implemented using standard 1.2 m double metal, single poly-n-well CMOS technology. All the implementations described here are based on a current 0924-4247/$ – see front matter © 2003 Elsevier B.V. All rights reserved. doi:10.1016/S0924-4247(03)00126-2