744 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 3, MARCH 2012 Design and Analysis of a Hardware-Ef cient Compressed Sensing Architecture for Data Compression in Wireless Sensors Fred Chen, Member, IEEE, Anantha P. Chandrakasan, Fellow, IEEE, and Vladimir M. Stojanović, Member, IEEE Abstract—This work introduces the use of compressed sensing (CS) algorithms for data compression in wireless sensors to ad- dress the energy and telemetry bandwidth constraints common to wireless sensor nodes. Circuit models of both analog and dig- ital implementations of the CS system are presented that enable analysis of the power/performance costs associated with the design space for any potential CS application, including analog-to-infor- mation converters (AIC). Results of the analysis show that a digital implementation is signicantly more energy-efcient for the wire- less sensor space where signals require high gain and medium to high resolutions. The resulting circuit architecture is implemented in a 90 nm CMOS process. Measured power results correlate well with the circuit models, and the test system demonstrates contin- uous, on-the-y data processing, resulting in more than an order of magnitude compression for electroencephalography (EEG) signals while consuming only 1.9 W at 0.6 V for sub-20 kS/s sampling rates. The design and measurement of the proposed architecture is presented in the context of medical sensors, however the tools and insights are generally applicable to any sparse data acquisition. Index Terms—Biomedical electronics, circuit analysis, com- pressed sensing, electroencephalography, encoding, low power electronics, sensors, wireless sensor networks. I. INTRODUCTION O VER the past two decades, advancements in microelec- tronics have enabled relatively cheap, distributed sensor nodes capable of moderate scale sensing, data collection, com- putation and communication. In turn, wireless sensor networks have emerged as a research area that spans a broad range of applications from agriculture to health care. Although the ap- plications are diverse, many of the technical challenges facing the eld are similar. From the protocol layer down to the cir- cuit level most of the challenges are related to the stringent energy constraints of each sensor node [1]. In most applica- tions, whether because of cost or utility, there is a need for each sensor node to have a lifetime in the 10 year range or be- yond. For example, even with a sensor lifetime of 10 years, a network with 4000 nodes, such as in a large ofce building, requires on average a battery changed per day [2]. Similarly, for patients who require implantable medical devices, limiting Manuscript received March 19, 2011; revised August 16, 2011; accepted September 18, 2011. Date of current version February 23, 2012.This paper was approved by Associate Editor Roland Thewes. The authors are with the Massachusetts Institute of Technology, Cambridge, MA 02139 USA (e-mail: fredchen@mit.edu). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/JSSC.2011.2179451 Fig. 1. Energy costs and power consumption for typical circuits in bio-sensor applications. It is assumed that the DSP lters some data and that the TX power scales with data rate. the frequency of replacing batteries both reduces costly surg- eries and improves the quality of life. With the energy density of modern portable batteries in the range of 1 W-hr/cc, even a 10 year device lifespan requires the sensor to consume on the order of 10 W of average power per cubic centimeter of bat- tery volume. Medical monitoring is an emerging application area that ex- emplies the stringent energy constraints imposed on wireless sensor nodes and their corresponding circuits. Fig. 1 shows the typical circuit blocks used in sensors for medical monitoring and their associated energy cost and power consumption at a given sample rate. As Fig. 1 shows, the cost to wirelessly transmit data is orders of magnitude greater than for any other function. With the exception of ultra-wideband (UWB) radios, which have lim- ited range and reliability issues, state-of-the-art radio transmit- ters exhibit energy-efciencies in the nJ/bit range while every other component consumes at most only tens of pJ/bit. This cost disparity suggests that some data reduction strategy at the sensor node should be employed to minimize the energy cost of the system. In applications such as implantable neural recording ar- rays, the high energy cost to transmit a bit of information and the radio’s limited bandwidth actually necessitate data compression or ltering at the sensor in order to reduce both energy consump- tion and data throughput [3]. Existing strategies for implementing integrated data com- pression or ltering solutions under these constraints largely revolve around detecting and extracting specic signal data [3]–[7]. However, the ltered data often contains limited infor- mation. For example, in neural recorders, the data is typically limited to just the time and amplitude of a neural spike event rather than the signal itself [3], [5]. Even when the event de- tection is used to trigger a full signal capture [4], the system is susceptible to missing events entirely if detection thresholds are not properly set. Meanwhile, feature extraction approaches re- quire training, are usually signal specic and typically provide only macro level decisions based on the original signals [6], [7]. For these signal processing strategies, there is a tradeoff between data reduction, robustness, implementation cost, and 0018-9200/$31.00 © 2012 IEEE