Implementation of a Micro Power 15-bit 'Floating-Point' A/D Converter L. Grisoni, A. Heubi, P. Balsiger and F. Pellandini Institute of Microtechnology University of Neuchâtel Tivoli 28, CH-2003 Neuchâtel-Serrières, Switzerland Phone: # 41 38 30 16 31, Fax: # 41 38 30 18 45, E-Mail: grisoni@imt.unine.ch ABSTRACT Micro power A/D converter are required for power sensitive, battery-operated equipment such as hearing aids. This paper overviews the principles of the 15-bit 'Floating point' converter and presents its implementation in a low voltage 2 μm CMOS tech- nology. The die area is 1.4 by 1.4 mm and the power consumption 50 μW at ±1.25 V and 16 kHz sampling frequency. Measurement showed that the internal noise level is higher then expected resulting in a reduced dynamic range of 13 to 14 bits. Informal listening tests showed a very good speech quality. 1. INTRODUCTION Progress in low-power microelectronics technology and digital signal processing has opened the way to numerous digital portable applications. In particular, new audio applications have been developed and exhibit a very fast growing market. Low power A/D converters targeted for audio signals are thus required to reduce the overall power consumption and consequently the battery life. Typically, for hearing aid devices, the audio signals cover a dynamic range of about 80 dB and to ensure satisfactory quality a bandwidth of 8 kHz must be provided. Though, because of masking properties of the human ear, the requirement on the noise level (SNR) is only about 30 dB [4]. The idea of a ‘floating point’ converter which separates dynamic range and resolution to decrease power consumption was presented in 1992 [1]. This first design, however, did not fully meet the expectation when dealing with demanding audio signals. The concept was thus improved [3] resulting in a new 15-bit, 9 bits mantissa floating point A/D converter. This paper focuses on the design and implementation of the above converter in a low voltage CMOS technology. Section 2 briefly reviews the revised ‘floating point’ A/D converter while section 3, 4 and 5 deal with hardware realization. Section 6 presents the implementation results and section 7 concludes the discussion. 2. FLOATING POINT A/D CONVERTER PRINCIPLES A concept for a “floating point” or “relative precision” A/D converter (figure 2.1) was first published by A. Schaub [1] in 1992. The main idea was to adaptively scale the input signal in such a way that most of the time, it would fit well to the fixed conversion range of a rather coarse quantizer. Scaling gain and quantizer output were subsequently combined in order to properly represent the signal sample within the full dynamic range of the acoustic input signal. analog input digital output s h i f t e r adaptation logic coarse quantizer adaptive gain Fig. 2.1: Block diagram of floating point A/D More precisely, in Schaub’s converter, the signal is fed to a programmable amplifier with gain settings ranging from 0 to 46.5 dB in steps of 1.5 dB. They are set by an adaptation logic and the amplified signal is applied to a 6- bit quantizer (5-bit magnitude plus sign). The five bits representing the magnitude of the quantized sample serve as the input to the adaptation logic which updates the gain of the programmable amplifier according to an adaptation table which is inspired by N.S. Jayant’s paper [2] on adaptive quantization of PCM signals. The multipliers are restricted to powers of 2 1/4 , corresponding to approximately 1.5 dB steps and the target value is half the maximum amplitude range. The performance of this converter was evaluated through simulations using male and female speech as well as music inputs. The input level of the test signals was adjusted to -30 dB with respect to the full range of the converter, corresponding to realistic conditions in audio applications such as hearing aids. Typical SNR values around 26 dB resulted from these experiments. ISLPED 1996 Monterey CA USA 0-7803-3571-8/96/$5.00  1996