Int. J. Electron. Commun. (AEÜ) 66 (2012) 18–22 Contents lists available at ScienceDirect International Journal of Electronics and Communications (AEÜ) j our na l ho mepage: www.elsevier.de/a eue Ultra low voltage, ultra low power low noise amplifier for 2 GHz applications Gh.R. Karimi ∗ , S. Babaei Sedaghat Department of Electrical Engineering, Faculty of Engineering, Razi University, Kermanshah, 67149, Iran a r t i c l e i n f o Article history: Received 21 December 2010 Accepted 18 April 2011 Keywords: Cascode topology Forward body bias Low voltage RF a b s t r a c t In this paper, a 0.29 V, 2 GHz CMOS low noise amplifier (LNA) intended for ultra low voltage and ultra low power applications is developed. The circuit is simulated in standard 0.18 m CMOS MOSIS. A two-stage architecture is then used to simultaneously optimize the gain and noise performance. Using forward- body-biased, the proposed LNA can operate at 0.29 V supply voltage, successfully demonstrating the application potential of dynamic threshold voltage technology in the radio frequency region. The LNA provides a good gain of 26.25 dB, a noise figure of 2.202 dB, reverse isolation (S 12 ) of -59.04 dB, input return loss (S 11 ) of -122.66 dB and output return loss (S 22 ) of -11.61 dB, while consuming only 0.96mW dc power with an ultra low supply voltage of 0.29 V. To the best of authors’ knowledge this is the lowest voltage supply and the lowest power consumption CMOS LNA design reported for 2 GHz to date. © 2011 Elsevier GmbH. All rights reserved. 1. Introduction Low noise amplifier (LNA) is one of the most important and essential block in RF receivers [1]. LNA is the first stage of any communication receiver, and its main function is to overcome the noise problem for the subsequent stages providing enough gain to make the signal easier to process. In LNA design, trade-offs between many figures of merits such as gain, noise figure, power, impedance matching and stability must be considered. The goal of the present study is to reduce the power consumption, which leads to an increase in the battery-use time. One solution is to reduce the supply voltage [2]. Cascode topology is one of the most popular topologies used for CMOS LNA designs [3,4]. Although it provides high gain, low noise, it is not suitable for low power supply as the minimum voltage supply for cascode LNA is at least 2V th [5]. In this paper, a modified cascade LNA is presented using a two-stage common source (CS)–common gate (CG) configuration and forward body bias technology while at the same time the supply voltage is successfully reduced to 0.29 V. At such a low supply voltage, there is a good trade-off between power and other performances. This design is very suitable for ultra low voltage and low power cir- cuits for RF applications. This paper is organized as follows. Input impedance matching is presented in Section 2. In Section 3, we explain the threshold voltage control and cascode topology. The proposed LNA topology and suitable design technique for ultra low voltage and low power are defined in Section 4. ADS simulation results and a comparison with other reported LNAs are presented ∗ Corresponding author. E-mail address: ghkarimi@razi.ac.ir (Gh.R. Karimi). in Section 5. Section 6 summarizes the main contributions of the paper. 2. Input matching The LNA is the first stage of the front-end of RF receiver. The input impedance of LNA is matched to 50  to get the maximum power transfer. To analyze the input matching network of LNA, the equivalent small-signal model in LNA input port is shown in Fig. 1. The input impedance is: Z in (s) = V in I in = g m L S C gs + s(L g + L S ) + 1 Sc gs (1) Z in (jw) = g m L S C gs + j  (L g + L S )w - 1 wc gs  (2) The first term is a frequency independent real part term. It can be equivalent to 50  for input matching. On the other hand, the second term is the imaginary part term, which is dependent on fre- quency. It is cancelled when w(L g + L S ) is equivalent to 1/wc gs at the desired operation frequency. The input 50  matching is achieved if g m L S C gs = 50 ˝ (3) W = 1  C gs (L g + L S ) (4) 1434-8411/$ – see front matter © 2011 Elsevier GmbH. All rights reserved. doi:10.1016/j.aeue.2011.04.008