978-1-4673-5292-5/12/$31.00 ©2012 IEEE Inductor Implementation Using CMOS Current Conveyor Integrator for Low Voltage Low Power Applications Fathi A. Farag Electronics and Communications Dept., Zagazig University, Zagazig, Egypt ffarag@zu.edu.eg Abstract — A new topology of CMOS floating and ground passive coil simulation are proposed in this work. The proposed active circuits are realized using the second-generation current conveyor integrator (CCII-Int). The ground coil is modeled only using one current mode integrator. Moreover, the floating inductor is simulated by two current-mode integrators. The proposed inductor circuits are considered as low voltage and low power (LVLP) since it's used CMOS inverter as class AB transconductance circuit. The high input impedance of the CMOS inverter simplifies the op-amp design since it's loaded only by capacitive load. An LC passive butter worth filter is designed and realized using the proposed circuits. The proposed circuit is designed using the MOST parameters of the IBM 0.13μ CMOS technology. Keyword : CMOS Current conveyor, LVLP, CMOS inductor, current-mode integrator I. INTRODUCTION It is well-known; replacement of conventional inductors by synthetic ones in passive LC ladder filters belongs to high- order low-sensitivity filter design. Therefore, the ground and floating coils are needed for complete passive LC circuit simulation ability in system-on-chip. The impedance converter has been used for this reason [1] using the current conveyor. The second generation current conveyor (CCII) has proved to be a functionally flexible building block for active only filter design and signal processing applications [2-5]. It satisfies higher signal bandwidth, greater linearity and dynamic range. Moreover, the trend to low voltage – low power (LVLP) circuit design has enormous challenged due to the dramatically growth of submicron technologies and battery life time of the portable devices. The circuit shown in Fig. 1, is consider as two stages amplifier with class AB output section [5,6]. The circuit is connected as unity gain amplifier (the differential stage and the output section -M 6 /M 7 ). The input current translates to voltage in the internal output of the first section (V DS4 ). The transfer function is square root relation and the rail to rail output ability shown in Fig. 1(c), which makes this cell to work at low voltage supply with accepted dynamic range. Moreover, the proposed cell considers as low power operation due to the class AB operation ability. The CCII input/output characteristic can be concluded as in equation 1.                                Vz Ix Vy Iz Vx Iy 0 0 0 1 0 0 0 1 0 (1) vz iz vy iy vx ix X CCII Z Y (a). Circuit schmatic. (b). Circuit symbol. (c). The I-V Characteristic of the CMOS inverter. Fig. 1, The basic CCII cell proposed in [5, 6]. This paper is organized as following: the current-mode integrator [7] for LVLP applications is reviewed in section II. The proposed inductors (ground/floating) realization and implementation are presented in section III. Moreover, illustrated passive filter is designed and tested for verification in section IV. Some practical parameter effects are studied in section V. Finally, our proposal is concluded in section VI. 2012 24th International Conference on Microelectronics (ICM)