VOL. 10, NO. 10, JUNE 2015 ISSN 1819-6608 ARPN Journal of Engineering and Applied Sciences © 2006-2015 Asian Research Publishing Network (ARPN). All rights reserved. www.arpnjournals.com 4467 A NOVEL ARITHMETIC AND LOGIC UNIT DESIGN USING UNCONVENTIONAL MATHEMATICS Nirmal Bhardwaj and V. J. K. Kishor Sonti Department of Electronics and Communication Engineering, Sathyabama University, Chennai, India E-Mail: nirmalbhrdwj@gmail.com ABSTRACT The ever increasing demand in enhancing the speed of processors to handle the challenging problems has resulted in the need of an efficient ALU. The speed of ALU greatly depends on multiplier and Vedic mathematics helps in the design of an efficient multiplier using Anurupyena and Urdhva Tiryakbhyam. Using Ekadhikena Purvena and Dwandwayoga a squarer circuit is generated. After designing the proposed Vedic multiplier and Squarer Circuit, it is integrated into an eight bit module of arithmetic logic unit along with the conventional adder, subtractor, and basic logic gates. The performance of the Different Multipliers and Squarer circuit is analyzed using Xilinx ISE 9.1i.From the results it is found that Dwandwayoga Squarer is better than Ekadhikena in terms of time delay but on the other hand Ekadhikena Purvena consumes less power than Dwandwayoga. Among multipliers Anurupyena is better in terms of power consumption than Urdhva Tiryakbhyam but it is having much delay. After synthesizing each module of multipliers they are incorporated into the existing ALU Design. Keywords: arithmetic logic unit, mathematics, anurupyena, urdhva tiryakbhyam, ekadhikena purvena, dwandwayoga. 1. INTRODUCTION In digital electronics, an ALU is a digital circuit that performs arithmetic and logical operations on integers and binary numbers. The inputs to an ALU are the data to be operated on and it is called as operands and a code indicating the operation to be performed; the ALU’s output is the result of the performed operation. Here in the design of ALU ancient Vedic mathematics sutras have been used. In section 2 all the Vedic sutras pertaining to the design of ALU are discussed in brief.Section2.1 illustrates the Anurupyena multiplier.Section2.2 illustrates about Urdhva Tiryakbhyam. Section 2.3 and Section 2.4 illustrates the sutras for squaring of numbers. Section III describes about the simulation output for all the Vedic multipliers. Section IV describes about result summary in terms of power and time delay. Finally the conclusion is given in section V. 2. VEDIC MATHEMATICS Vedic Mathematics is the name given to the ancient system of Indian Mathematics which was rediscovered between 1911 and 1918 by Sri Bharati Krishna Tirthaji (1884-1960). Vedic Mathematics contains sixteen sutras among them the sutras which are used for the design of ALU are discussed here. Table for Vedic sutras relevant for multiplication is given below. Table-1. Vedic Sutras relevant to the data conditions. DATA CONDITIONS SUITABLE VEDIC SUTRA APPLICABLE Numbers near to multiple of 10 Anurupyena Squaring of numbers ending with 5 Ekadhikena Purvena Squaring of numbers(other cases) (Dwandwayoga)Duplex method Multiplication of numbers (all other cases) Urdhva Triyakbhyam 2.1 Anurupye (Shunyamanyat) sutra Anurupyena is an up sutra which means proportionality. This Sutra is used to find the product of two numbers when both the numbers are close to the common bases like 50, 60, 200 etc (multiples of powers of 10) [3]. Block Diagram of Anurupyena multiplier is given in Figure-1. MULTIPLIER MULTIPLCAND BCD CONVERTER BCD CONVERTER MULTIPLY BY 10 SUBTRACTOR SUBTRACTOR MULTIPLIER BCD CONVERTER ADDER RHS OF THE PRODUCT DIVIDER LHS OF PRODUCT Figure-1. Anurupyena multiplier logical diagram. 2.2 Urdhva Tiryakbhyam The ‘Urdhva Tiryakbhyam’ sutra is a common method of multiplication which can be applied to all cases of multiplication. Figure-2 shows the diagrammatic representation of UT process flow.The rule of this multiplication is at first, multiplication starts from MSB, of both multiplicands to get first cross product. Then increasing one bit, further calculation of cross products