VHDL-AMS Modeling of Continuous-Time Complex Bandpass Delta Sigma Modulator Nejmeddine Jouida 1 , Chiheb Rebai 1 , Adel Ghazel 1 and Dominique Dallet 2 1 CIRTA’COM Research Unit École Supérieure des Communications de Tunis (SUP’COM), Tunisia 2 IMS Laboratory – ENSEIRB – University of Bordeaux, France Phone: (33) 5 40 00 26 32, Fax: (33) 5 56 37 15 45, Email: nejmeddine.jouida@ims-bordeaux.fr Abstract - Continuous-Time delta sigma modulators (CT M), by their nature, are mixed-signal systems. That fact creates a discontinuity in the traditional IC design flow which assumes that “discrete” and “continuous” time domain designs require separate design tools. In this work, we present a top level behavioral approach of modeling CT complex Bandpass (CBP) M using VHDL-AMS language. The CT  model can be used within the analog IC design environment. Fifth-order CT CBP M which is tailor made for Bluetooth and WiFi Low-IF receiver demonstrates clearly the modeling technique. I. Introduction The development of fully integrated systems for wireless receivers, which consume low power and permit low cost implementations, signifies a major challenge for a lot of analogue designers of the present generation. To better cope with this challenge the low-IF architecture [1] forms the basic topology of many recent receiver architectures. It combines the advantage of a very low IF and a power efficient image rejection without the need for external high Q filtering. Complex sigma-delta A/D converters have an advantage over real signal converters in I/Q (In-phase/Quadrature phase) radio applications in terms of improved stability and large bandwidth. A complex A/D can be designed that has no conjugate poles and zeros, which realize an asymmetric frequency response. The resulting noise transfer function is immune to changes in the center frequency [2]. A lower order complex modulator can then achieve the same performance as higher-order real modulators [2] [3]. Recently, continuous-time  ADCs have become very popular because of low power consumption, high speed and small area with respect to their discrete-time counterparts. The fact that CT M are mixed-signal systems creates a discontinuity in the traditional IC design flow which assumes that “discrete” and “continuous” time domain designs require separate design tools. In this work, we present a top level behavioral CT  model that can be used within the analog IC design environment. Fifth-order CT CBP M which is tailor made for Bluetooth and WiFi Low-IF receiver demonstrates clearly the modeling technique. II. Objectives More recent developments of the low-IF receiver architecture [1] have concentrated on the digitization of the signal chain with a view to improving multi-mode capability. In an initial realization, this involved positioning the analogue-to-digital converter (ADC) immediately after the mixers of the front end, eliminate the need for automatic gain control (AGC) and move the channel filtering into the digital domain. Hence, to benefit from the obvious merit of this advance, one attractive aspect has proved to be the need for a complex ADC resulting directly from the use of the low IF. The aim of this paper is behavioral modeling of continuous-time quadrature Bandpass  modulator for Bluetooth and WiFi standards using low-IF architecture (Figure 1) improved in [4]. 0 90    ΔΣ   LNA RF Filter I Q I Q low-IF 0 90    ΔΣ   LNA RF Filter I Q I Q low-IF Figure 1. Low-IF receiver architecture operating with one continuous-time quadrature bandpass  modulators.