A Novel Structure for Improvment the I on /I off Ratio in Nano-Scale Double Gate Source- Heterojunction-MOS-Transistor Mahsa Tahermaram, Mahdi Vadizadeh, Morteza Fathipour Dept. of Electrical and Computer Engineering University of Tehran Tehran, Iran ma.tahermaram@gmail.com , Vadizadeh@gmail.com , mfathi@ut.ac.ir Abstract—In this paper, we introduce a novel double gate SHOT which provides at least the drain current twice higher than that of the conventional SHOT structure. Improved characteristics are originated from the high velocity electron injection at the source edge due to the band offset energy. The analysis of the off- state current characteristics shows that provided 89% reduction in off-stat current. Based on this analysis, we proposed use of work function engineering as well as extra grounded gate to minimize the magnitude of GIDL current which is the main component of the off-state current. Keywords-band offset energy; band to band generation; GIDL; heterojunction; off-state current; SHOT I. INTRODUCTION Improvement in the VLSI/ULSI circuit speed may be achieved by enhancement of the charging current of the device. This will be possible if new materials with higher carrier mobility are considered as replacement for conventional silicon or if novel methods are employed to enhance the carrier mobility such as applying strain in Si substrate. The use of strained Si/SiGe material promises the improvement of speed performance of CMOS devices by offering higher electron and hole mobility. Considering that the carrier velocity at the source edge may be decreased by Fermi or thermal velocity, one possible approach to overcome this problem is to develop the structures which could provide higher carrier velocity [1]. Recently, a new structure for MOSFET has been proposed to enhance carrier velocity [2]. In this scheme carriers earn more kinetic energy due to existence of band offset energy between the strained-Si channel and SiGe source region. The high drain current and transconductance make the source-heterojunction- MOS-transistor (SHOT), suggested by Mizuno et.al suitable for high speed applications [3,4]. In order to further increase the on-state current (I on ), we propose a double gate SHOT structure. This device however suffers from large leakage current. The off-state current (I off ) should be reduced since it results in an increase in the static power consumption. This leakage current at low gate voltage predominately consists of subthreshold current, gate induced drain leakage current (GIDL) and reversed biased pn junction current. In this paper, we will focus on developing methods which resulted in optimization of the I on / I off ratio. Here, we report on a scheme which can reduce the leakage current up to 28% by grounding an extra gate located at the overlapped region. Furthermore, the leakage current could be reduced by 89% compared to conventional double gate SHOT structure if work function engineering is employed for the grounded gate. This major reduction in leakage current is mainly due to the suppression of GIDL which is the main component in the leakage current. This paper is organized as follows. In Section II, GIDL current is briefly introduced. In section III, we will describe the operation of source-heterojunction-MOS- transistor. In section IV, proposed device structure is explained. In section V, we will discus electrical characteristics of the device. Conclusions are provided in section VI. II. GIDL CURRENT MECHANISM In n-channel double gate SHOT structure, the GIDL phenomenon occurs when drain-gate voltage (V DG ) becomes positive. When the gate is grounded or becomes negatively biased, a depletion region is formed underneath the gate near drain-side of the overlap region. Hole accumulation at the surface causes the depletion region width to become narrower in this region. This leads to field crowding and results in band to band tunneling in this region [5]. Particularly in the gate– drain overlap region, electron–hole pairs are generated due to Shockley-Read-Hall (SRH) mechanism, this region acts like a pump so that electron–hole pairs are driven out from it. Electrons collected by the drain contribute to GIDL current. Holes are swept vertically to the substrate and contribute to the reversed biased pn junction current. GIDL current is mainly caused by band to band tunneling in the gate overlapped region of the drain [6]. Here, electron-hole pairs are generated by the tunneling of valance band electrons to the conduction band and then collected by drain and substrate [7]. Band to band tunneling is very much dependent up on the electric field between the gate and drain. The Authors are with the Device and Process Modeling and Simulation Laboratory, University of Tehran, Tehran, IRAN (corresponding author phone: (+98 912)147-3209; fax: (+98 21)877–8690; e-mail: mfathi@ut.ac.ir). 978-1-4244-3705-4/09/$25.00 ©2009 IEEE 305