International Journal of the Physical Sciences Vol. 7(28), pp. 5054-5061, 19 July, 2012 Available online at http://www.academicjournals.org/IJPS DOI: 10.5897/IJPS12.094 ISSN 1992 - 1950 ©2012 Academic Journals Full Length Research Paper Quantum simulation study of gate-all-around (GAA) silicon nanowire transistor and double gate metal oxide semiconductor field effect transistor (DG MOSFET) Reza Hosseini 1 *, Morteza Fathipour 2 and Rahim Faez 3 1 Department of Electrical Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran. 2 Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran. 3 Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran. Accepted 28 May, 2012 In this paper, electrical characteristics of the double gate metal oxide semiconductor field effect transistor (DG MOSFET) and that of gate all around silicon nanowire transistor (GAA SNWT) have been investigated. We have evaluated the variations of the threshold voltage, the subthreshold slope, drain- induced barrier lowering, ON and OFF state currents when channel length decreases. Quantum mechanical transport approach based on non-equilibrium Green’s function method (NEGF) has been performed in the frame work of effective mass theory with taking into account exchange-correlation effects. Its simulation consists of solutions of the three dimensional Poisson’s equation, two dimensional Schrodinger equation on the cross section plane, and also transport equation. We have shown that for lengths smaller than 15 nm, short channel effects dominate. When the dimensions become smaller, interelectronic distance decreases and the interaction between electrons and also exchange correlation effects increase. We have also demonstrated that short channel effects are decreased using the device which has a good control of gate. Key words: Double gate metal oxide semiconductor field effect transistor (DG MOSFET), gate all around silicon nanowire transistor (GAA SNWT), non-equilibrium Green’s function (NEGF), exchange-correlation potential, short channel effects. INTRODUCTION As the MOSFET gate length reaches the nanometer regime, short channel effects (SCEs) become more and more significant, thus, new circuit design technologies and various device concepts are becoming extensively attractive (Alam and Abdullah, 2012; Bahari et al., 2011; Kurniawa et al., 2010; Loussier et al., 2009; Tienda et al., 2008). Multiple-gate structures and silicon on insulator (SOI) are promising structures to overcome SCEs in nanometre-scaled MOSFETs (Gaffar et al., 2011; Ranaka et al., 2011). Conventional CMOS technology is facing greater challenges in terms of scaling due to *Corresponding author. E-mail: r.hosseini@srbiau.ac.ir. Tel: +989143881861. reduced gate control, increased SCEs and high leakage currents (Ancona et al., 1999). The DG and GAA devices ensure that no part of channel is far away from the gate. This gives better control of the channel by the gate electrodes. In addition, these devices exhibit a good I on /I off and present a channel with high conductivity. Gate all around silicon nanowire transistor (GAA SNWTs) and Double Gate Metal Oxide Semiconductor Field Effect Transistor (DG MOSFETs) have emerged as promising devices to keep SCE under control, exhibiting quasi-ideal subthreshold slope with undoped channel. The use of a lightly doped or undoped channel maximizes the effective carrier mobility and hence ON current density. Also, the absence of dopant in the channel decreases the thres- hold voltage variations and drain to body capacitance which provide improved circuit performance (Xiao et al.,