Chapter 8 Evaluating System-Level Monitors and Knobs on Real Hardware Panagiota Nikolaou, Zacharias Hadjilambrou, Panayiotis Englezakis, Lorena Ndreu, Chrysostomos Nicopoulos, Yiannakis Sazeides, Antoni Portero, Radim Vavrik, and VitVondrak 8.1 Introduction High-Performance Computing (HPC) infrastructures run a diverse set of applica- tions with different Quality-of-Service (QoS) requirements [7]. These requirements come in various forms, such as operational power, performance, energy, cost, and availability. Naturally, HPC systems need to be conﬁgured in a way to satisfy those application requirements [15]. To conﬁgure a system, all the different system hardware and software knobs are set at speciﬁc settings, with many remaining at a default setting, and then, while the application runs, various monitors are observed to determine whether the various requirements are satisﬁed. Hardware and software knobs like Simultaneous Multithreading, DVFS, prefetching must be set to correct settings to achieve optimal energy and cost efﬁciency. Unsurprisingly, the conﬁguration space is extremely large and such conﬁguration search efforts are in practice ad hoc and nonoptimal. One way to reduce the conﬁguration search dimensionality and complexity is to reduce the requirements that need to be satisﬁed, as well as the monitors and knobs that need to be evaluated. Reduction of a problem’s dimensionality is not a P. Nikolaou () · Z. Hadjilambrou · P. Englezakis · L. Ndreu · C. Nicopoulos · Y. Sazeides University of Cyprus, Nicosia, Cyprus e-mail: panagiota.nikolaou@cs.ucy.ac.cy; zhadji01@cs.ucy.ac.cy; englezakis.panayiotis@ucy.ac.cy; lndreu01@cs.ucy.ac.cy; nicopoulos@ucy.ac.cy; yanos@cs.ucy.ac.cy A. Portero · R. Vavrik · V. Vondrak V ˘ SB - Technical University of Ostrava, IT4Innovations National Supercomputing Center, Ostrava, Czech Republic e-mail: antonio.portero@vsb.cz; radim.vavrik@vsb.cz; vit.vondrak@vsb.cz © Springer International Publishing AG, part of Springer Nature 2019 W. Fornaciari, D. Soudris (eds.), Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms, https://doi.org/10.1007/978-3-319-91962-1_8 167