COMPUTER VISION AND IMAGE UNDERSTANDING Vol. 70, No. 1, April, pp. 51–62, 1998 ARTICLE NO. IV970600 A Subpattern Level Inspection System for Printed Circuit Boards Madhav Moganti Advanced Technology Center, Bell Laboratories, Homdel, New Jersey 07733 E-mail: mmoganti@lucent.com and Fikret Ercal ∗ Computer Science Department and Intelligent Systems Center, University of Missouri, Rolla, Missouri 65401 E-mail: ercal@cs.umr.edu Received March 11, 1996; accepted January 21, 1997 The existing inspection systems are algorithmically slow and suf- ferfrom many drawbacks in meeting the inspection requirements of printed circuit board fabrication. The system presented in this paper can handle all of the defects simultaneously with the same approach and is significantly faster compared to the existing approaches. The system consists of three major phases:the first step is the segmen- tation of the golden PCB image into basic subpatterns, the second step is the learning phase, and the third and final step is the verifi- cation/inspection phase. The system presented here introduces the application of neural networks and fuzzy logic in printed circuit board inspection. The method is highly parallel and works at the subpattern level. Experimental results which demonstrate the ef- fectiveness of the proposed algorithms are given. c  1998 Academic Press Key Words: printed circuit board inspection;reference compari- son; design-rule checking; image segmentation; feature extraction; neural networks; fuzzy logic; associative memories. 1. INTRODUCTION Printed circuit boards (PCBs) are inspected extensively be- fore the insertion of components and the soldering process to locate defects (also called anomalies or faults) that may occur after the etching process. Even though automated approaches are used in the verification of artwork before beginning actual etch- ing process on the board, bare-board defects still exist. The types of faults range from hairline (e.g., size equal to 100 micrometers) breaks and bridges as small as 1 mm between conductor paths, to unacceptable enlargements and reductions in linewidths, to poorly formed plated through holes. Figure 1 shows a PCB subimage with a variety of defects in it. Though each defect shown in the figure is a representative example for that particular ∗ F. Ercal was supported in part by the Department of the Navy (Contract No. 0164-97-C-0008) through a subcontract from Automation Engineering Inc. URL: http://www.cs.umr.edu/˜ercal/. defect, the shape and size of the defect varies from one occur- rence to another. As the linewidths and spacings get smaller and smaller, the defects get more serious and harder to detect. The amount of data available for inspection is in the order of hundreds of megabytes for a single layer of a typical PCB. For example, a typical PCB of size 18 × 24 ′′ , when digitized at a typical resolution of 0.001 ′′ , yields 432MB pixels. Hence inspection at very high speeds is critical to the fabrication of PCBs as there are several stages in the fabrication of a single layer of a PCB where inspection is needed. A large number of PCB inspection algorithms have been pro- posed in the literature to date [1]. In general, they fall into one of three categories: reference comparison (or referential ap- proaches), nonreferential approaches, and hybrid approaches. The referential methods execute a point-to-point (or feature-to- feature) comparison with a “good” sample image stored in an image database. These methods detect errors such as missing tracks, missing termination, opens, and shorts. The drawback of these methods is that, since differences between the PCB un- der inspection and a “golden board” are called defects, board distortions, as a consequence of processing, may be identified as anomalies. The nonreferential methods use the design-speci- fication knowledge in verifying the boards to be inspected. Ap- plying the design-rule verification process directly to the image patterns is a time consuming process, and hence these methods process/transform the image into a form which reduces the ver- ification time. The disadvantage of these methods is that they work well in identifying only certain kinds of defects, such as the verification of widths and spacing violations and may miss flaws that do not violate these rules, such as shorts that are identical to conductors. Hybrid systems make use of both the design-rule methods and comparison methods as they complement each other and there- fore achieve a high error sensitivity. These hybrid flaw-detection techniques increase the efficiency of the system by making use of both referential and design-rule techniques, exploiting the 51 1077-3142/98 $25.00 Copyright c  1998 by Academic Press All rights of reproduction in any form reserved.