Compiling a Mechanical Nanocomputer Adder Thomas P. Way and Tao Tao Applied Computing Technology Laboratory Department of Computing Sciences Villanova University, Villanova, PA 19085 {thomas.way,tao.tao}@villanova.edu Abstract - Computer component fabrication is approaching physical limits of traditional photolithographic fabrication techniques. An alternative computer architecture may be enabled by the rapidly maturing field of nanotechnology, and consist of nano- mechanical computational machines similar to those first proposed by Eric Drexler, or other nanoscale components. In this study, we propose the design of a nanocompiler which targets a simulated hydrocarbon assembler. The compiler framework and resulting nano-mechanical machine is simulated using a component-level Colored Petri Net model of a 32-bit adder and an atomic-level gate simulator. Future work is proposed to extend the framework to simulate a full range nano-mechanical processing components. Keywords: Nanocompilers, nanocomputers, high performance computing, reconfigurable computing. 1 Introduction Despite recent significant advancements in feature size to 45nm [13], there is growing consensus that the familiar density-doubling prediction of Moore’s Law as it concerns 2D fabrication techniques is reaching limits [10,11]. Evidence is abundant of a shift away from developing techniques that fit increasing numbers of transistors onto a chip, as manufacturers pursue technology that enables increasing numbers of processing cores on a single chip [12,14]. The movement toward increased coarse-grained parallelism, the nearing of inherent limits of photolithographic techniques, and the continued maturation of the field of nanotechnology, could hint at a serendipitous convergence of needs and capabilities. The way forward in chip design and fabrication may well include applied computational nanotechnology as originally foreseen by Eric Drexler [6], and furthered by many others [2,7,19,23]. Current chip design techniques, and in fact virtually all software and hardware design of any significance, make use of a variety of automated compiler tools to generate complex designs, layouts or executable code from an original human-readable specification or source program [11]. Molecular manufacturing, and other applications of nanotechnology, are likely to require a similar approach in order to manage the scope and complexity of translating a high-level processor specification into nanoscale components. Modern compilers for high performance computer architectures apply a sequence of sophisticated analyses and optimizations to translate a source language program into efficient binary machine code. Machine specific optimizations, customized to the particular target architecture, are required to achieve significant speedup on modern, high-performance architectures [1,11]. In spite of the excitement over recent advances in feature-size reduction [12,13], heat dissipation and barriers of physics remain as problems [2,10]. Nanotechnology, manufacturing performed through manipulation of atoms and molecules, or through other nanoscale manufacturing techniques, is capable of overcoming these barriers [6]. The continuing trend toward flexible computer architectures with higher degrees of parallelism suggests that the field of reconfigurable computing, perhaps enabled through the use of nanotechnology, is the next evolutionary step in processor design [2,5]. Nanocomputing is taken to mean the class of highly reconfigurable, nanotechnology-based, computer architectures, and a nanocompiler is the software-hardware system that targets such a nanocomputer. In this paper, we present the design of a nanocompiler framework that targets one form of nanoscale computer architecture, nano- mechanical computing devices. This form of a compiler framework translates a source code program into both an optimized executable program and a customized nanocomputer on which the executable program will be ideally suited to run. Much as traditional compilers customize the program to suit the machine [1], this proposed compiler customizes the machine to fit the program. Since no such nanocomputer architecture yet exists, our study demonstrates the approach using a molecular design language, a simulated hydrocarbon assembler, and a mathematical modeling tool to demonstrate and estimate the performance of this approach.