Process Synthesis with Sequential and Parallel Constraints Richard Mrasek, Jutta Mülle, and Klemens Böhm Karlsruhe Institute of Technology (KIT) Institute for Program Structures and Data Organization 76131 Karlsruhe, Germany { richard.mrasek | jutta.muelle | klemens.boehm }@kit.edu Abstract. Synthesis is the generation of a process model that fulfills a set of declarative constraints, a. k. a. properties. In this article, we study synthesis in the presence of both so-called sequential and parallel constraints. Sequential constraints state that certain tasks must occur in a specific ordering. Parallel constraints specify the maximal degree of parallelization at a certain position in a process model. Combining both sequential and parallel constraints in one approach is difficult, because their interference is complex and hard to foresee. Besides this, with large specifications, solutions which do not scale are not viable either. Our synthesis approach consists of two steps. First, we generate a model fulfilling only the sequential constraints. We then apply a novel algorithm that deparallelizes the process to fulfill the parallel constraints as well as any additional optimization criteria. We evaluate our approach using the real-world use case of commissioning in vehicle manufacturing. In particular, we compare our synthesized models to ones domain experts have generated by hand. It turns out that our synthesized models are significantly better than these reference points. 1 Introduction Synthesis is the generation of a process model that fulfills a set of declarative con- straints, a. k. a. properties. Synthesis has several important application scenarios, described in various publications: – to generate a process skeleton as a basis for process models or as a communi- cation point between business and compliance experts [1], – to build web service composition models [2], – to automatically generate production processes [3], – to assure that the process model complies with life cycles of its artifacts [4]. Synthesis is different from verification, but is related [5][6]. Verification is checking whether a given process model has certain properties. Synthesis in turn generates a process model from properties. Both require a formal model of the properties as a starting point. Synthesis from compliance rules is also known as Compliance by Design [4], in contrast to Compliance by Validation [7].