www.advmat.de www.MaterialsViews.com COMMUNICATION © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim wileyonlinelibrary.com 992 Adv. Mater. 2011, 23, 992–997 Jun Liu, Jonathan W. Hennek, D. Bruce Buchholz, Young-geun Ha, Sujing Xie, Vinayak P. Dravid,* Robert P. H. Chang,* Antonio Facchetti,* and Tobin J. Marks* Reinforced Self-Assembled Nanodielectrics for High-Performance Transparent Thin Film Transistors J. Liu, J. W. Hennek, Y.-g. Ha, Prof. A. Facchetti, Prof. T. J. Marks Department of Chemistry and the Materials Research Center Northwestern University 2145 Sheridan Road, Evanston, IL 60208, USA E-mail: a-facchetti@northwestern.edu; t-marks@northwestern.edu Dr. D. B. Buchholz, Dr. S. Xie, Prof. V. P. Dravid, Prof. R. P. H. Chang Department of Materials Science and Engineering and the Materials Research Center Northwestern University 2220 Campus Drive, Evanston, IL 60208, USA E-mail: v-dravid@northwestern.edu; r-chang@northwestern.edu DOI: 10.1002/adma.201004198 Transparent thin film transistors (TFTs) have stimulated great scientific and technological interest due to potential applications in “invisible” electronics, such as transparent touch panels and see-through displays. [1–6] Since the first demonstration of trans- parent TFTs using a crystalline ZnO semiconductor, [7] exten- sive efforts have sought to enhance performance by increasing the field-effect mobility ( μ FE ) and/or lowering the operating voltage. [8–12] Principal foci have included the semiconductor and gate dielectric, two essential TFT materials. Among the diverse transparent semiconductors, amorphous transparent oxide semiconductors (a-TOSs) offer distinctive attractions vis-à-vis organics and crystalline TOSs, including good mobility, excel- lent environmental stability, low-temperature processability, optical transparency, smooth surfaces, and compositional uni- formity. [4,13–15] For example, amorphous Zn-In-Sn-O (a-ZITO) films afford moderate TFT performance at operating voltages ≥ 10 V when paired with a SiO 2 gate dielectric. [16–20] An effective approach to enhancing TFT performance is to introduce a self-assembled nanodielectric (SAND; Figure 1 a) composed of a saturated hydrocarbon layer, a π-polarizable stilba- zolium layer, and a chlorosiloxane-derived SiO x “capping” layer. These gate dielectrics can be deposited near room temperature by straightforward wet chemistry, and have large capacitances, low leakage, high breakdown fields, and suppress trapped charge between the dielectric and semiconductor for many classes of organic and inorganic semiconductors. [21–23] Nevertheless, while SANDs exhibit good chemical and thermal stability, [24–26] recent work suggests that direct exposure to high-energy ions and plasmas present in pulsed laser deposition (PLD) semicon- ductor growth processes, seriously degrades SAND dielectric properties and TFT performance. [27] It would therefore be highly desirable to devise approaches to enhancing SAND robustness. We report here that a simple vapor-derived hexachlorodisiloxane (HCDS, Cl 3 SiOSiCl 3 ) coating (“v-SiO x ”) greatly enhances SAND durability with respect to PLD laser plumes. This “reinforced” SAND (R-SAND) enables the growth of high-quality, optically transparent a-ZITO TOS channels and TFTs operating at volt- ages of ≤1.0 V with mobilities as high as 140 cm 2 /V·s. After SAND films were fabricated via solution processing, [21] a ∼5 nm thick v-SiO x layer was grown by HCDS vapor deposition, followed by ambient exposure for crosslinking. [28] Figure 1b shows capacitance vs. frequency (at 2.0 V) data for SAND, R-SAND, and v-SiO x films measured as n + -Si/dielec- tric/Au devices. Compared to SAND, which exhibits a high capacitance ( C i ) of ∼220 nF/cm 2 at 2.0 V/10 KHz, C i for R-SAND is ∼180 nF/cm 2 measured under the same conditions. The slightly smaller R-SAND C i is not unexpected considering the series-connected nature of the top v-SiO x layer, which by itself exhibits C i ∼750 nF/cm 2 . While v-SiO x alone exhibits moderate gate leakage, both SAND and R-SAND exhibit excellent insu- lating properties with leakage current densities <10 -6 A/cm 2 at a field of ±1.0 MV/cm using Au top-contact electrodes (Figure 1c). PLD is a versatile growth method using laser pulses to vaporize target materials, and produces films with compositions nearly identical to those of the target, making it an ideal explor- atory technique for multi-component oxide films. [29,30] However, the dense forward-directed plume generated between the target and substrate is composed of high-energy species [31,32] which can resputter the substrate surface and potentially damage soft materials. To assess SAND durability under PLD conditions, a-ZITO transparent oxide conductor (TOC) films were grown by PLD as top-contact electrodes for leakage current vs. elec- tric field measurements. Note that all a-ZITO TOC deposition parameters are identical to those for a-ZITO TOS growth in TFT fabrication, except for a slightly lower oxygen partial pres- sure ( P O2 ) of 7.0 × 10 -3 vs. 2.2 × 10 -2 Torr used for a-ZITO TOS growth. [20] Figure 1c shows leakage data for n + -Si/dielectric/a- ZITO TOC devices with a-ZITO electrodes grown on top of SAND or R-SAND films by PLD. The SAND samples have unac- ceptably large leakage current densities, from ∼10 -4 to >10 -2 A/cm 2 at a ±1.0 MV/cm electric field, indicating severe damage. In contrast, the R-SAND samples having the v-SiO x reinforcing layer retain excellent insulating properties with leakage cur- rent densities <10 -6 A/cm 2 at a ±1.0 MV/cm electric field. These results indicate that the ∼5 nm thick v-SiO x protective layer (vs. the ∼0.8 nm SAND capping layer; Figure 1a) significantly enhances SAND durability under PLD conditions. Low gate leakage is of course essential for acceptable TFT performance. a-ZITO TOS-based TFTs were first fabricated on n + -Si substrates using either SAND or R-SAND dielectrics and Au source/drain electrodes, with devices fabricated in parallel on p + -Si/SiO 2 (300 nm thermal oxide) substrates serving as