Research Article Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection Aous H. Kurdi, Janos L. Grantner, and Ikhlas M. Abdel-Qader Electrical and Computer Engineering Department, Western Michigan University, Kalamazoo, MI 49009, USA Correspondence should be addressed to Aous H. Kurdi; aoushammad.kurdi@wmich.edu Received 5 December 2016; Accepted 8 February 2017; Published 1 March 2017 Academic Editor: Yuko Hara-Azumi Copyright © 2017 Aous H. Kurdi et al. Tis is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. In this paper, the design and the implementation of a pipelined hardware accelerator based on a fuzzy logic approach for an edge detection system are presented. Te fuzzy system comprises a preprocessing stage, a fuzzifer with four fuzzy inputs, an inference system with seven rules, and a defuzzifcation stage delivering a single crisp output, which represents the intensity value of a pixel in the output image. Te hardware accelerator consists of seven stages with one clock cycle latency per stage. Te defuzzifcation stage was implemented using three diferent defuzzifcation methods. Tese methods are the mean of maxima, the smallest of maxima, and the largest of maxima. Te defuzzifcation modules are interchangeable while the system runs using partial reconfguration design methodology. System development was carried out using Vivado High-Level Synthesis, Vivado Design Suite, Vivado Simulator, and a set of Xilinx 7000 FPGA devices. Depending upon the speed grade of the device that is employed, the system can operate at a frequency range from 83 MHz to 125 MHz. Its peak performance is up to 58 high defnition frames per second. A comparison of this system’s performance and its sofware counterpart shows a signifcant speedup in the magnitude of hundred thousand times. 1. Introduction Digital system design using Field Programmable Gate Arrays (FPGAs) focuses on performance, device utilization, and rapid development. Xilinx Vivado HLS ofers a great devel- opment environment that enables the analysis of the system’s performance and design optimization. It also facilitates mod- ularized system design. Te Vivado Design Suite provides the means for developing dynamic, partially reconfgurable designs in which diferent hardware modules can be swapped in and out to utilize available hardware resources on the fy. FPGAs, as a platform, represent one of the most qualifed contenders for hardware implementation of digital signal processing systems [1]. In the Xilinx 7 Series devices, the programmable elements organized in blocks called Confg- urable Logic Block (CLB). Each CLB is comprised of two slices, and each slice is provided with a 6-input 1-output look-up table (LUT), distributed memory, shif register, high- speed logic for arithmetic functionality, a wide multiplexer, and a switching matrix to facilitate the access to routing elements on the chip [2]. Te synthesizer tool assigns the chip’s resources, mainly the CLBs, in accordance with the designer choice to implement sequential or combinational logic circuits. Digital systems by nature rely on Boolean logic. Boolean logic has been, conventionally, the staple of knowledge repre- sentation for quite long. Te main shortcoming in this regard is the incomplete applicability to situations of uncertainty and inaccuracy [3]. Tus, conventional approaches founded on Boolean logic do not provide suitable frameworks to represent human knowledge that is characterized by the uncertainty and fuzziness associated with the human cog- nitive function. Fuzzy logic, however, provides a mathemat- ically feasible framework to represent degrees of truth and falsehood in contrast to the classic true or false values of Boolean logic. Fuzzy logic is referred to here in the wide- sense [4] that includes the concept of fuzzy sets [5] and approximate reasoning. For many applications, fuzzy logic has become an indispensable tool. Tose applications include system control, intelligent systems, and image processing [6]. Most image processing algorithms contain edge detection as a vital part. Edge detection is, essentially, any method or Hindawi International Journal of Reconfigurable Computing Volume 2017, Article ID 1325493, 13 pages https://doi.org/10.1155/2017/1325493