Validation of SoC Firmware-Hardware Flows: Challenges and Solution Directions Yael Abarbanel*, Eli Singerman*, Moshe Y. Vardi † *Intel Corporation, † Rice University ABSTRACT In SoC, key infrastructure/backbone flows are distributed across many IPs and involve tight firmware and hardware interaction. Examples include resets, power management, security, and more. Traditional hardware validation techniques are no-longer adequate for such flows, due to the short time-to- market requirements, in particular, for mobile devices. In this paper, we articulate the challenges and discuss a few solution directions that are being pursued in this space at Intel. Categories and Subject Descriptors B.6.3 [Logic Design]: Design Aids – optimization, simulation, verification. J.6 [Computer-aided engineering]: Computer- aided design (CAD). General Terms Verification, Algorithms, Measurement, Documentation, Performance, Design, Standardization, Theory Keywords Validation, Simulation, Emulation, FPGA, Virtual Platform, Hardware-Software co-validation, SoC, Flows, Debug, Formal Analysis. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from Permissions@acm.org . DAC '14, June 01 - 05 2014, San Francisco, CA, USA Copyright 2014 ACM 978-1-4503-2730-5/14/06…$15.00. http://dx.doi.org/10.1145/2593069.2596692 1. INTRODUCTION In SoC’s, several key “infrastructure” flows (we use the term “flows” to refer to cross-IP transactions) are distributed across many IP’s and sub-systems and their functionality is implemented by significant interaction of firmware (FW) and hardware (HW). Examples of such flows include resets, power management, security, and more. Even though these are not the major “selling features” of a product, they are the backbone for its overall functionality. At Intel, the quest to improve time-to- market intensifies in the segment of mobile devices that include smartphones, tablets, two-on-one devices, and new form-factor notebooks. To enable this, we are seeking new methods for significant reduction in the time it takes to validate these distributed capabilities. The need for new methods is due to realization that traditional validation techniques that served us well for many generations of hardware-centric products are inadequate for the problem at hand. This is due to three major reasons: A. The architectural complexity of these global flows often results-in spec errors that when found late in the product life-cycle are very costly to fix. This means that we have to find ways to analyze the architectural specification and not only the implementation. Yet, due to the strict time-to-market requirements, we cannot afford duplicating the validation effort at the architectural level. We must leverage the effort spent on spec analysis, and obtain collaterals that can be used for implementation validation. B. The key role that FW is playing implies that stand- alone HW validation is less relevant. For the same reason, stand-alone FW validation is problematic, and what is really needed are effective ways for FW/HW co-validation. C. The distribution of these flows across many IPs and subsystems makes verification highly challenging.. In addition to its contribution to global flows, each IP has its own functionality that should be validated. Validating IP functionality is often challenged by the global flows. Both design and validation solutions should enable decoupling the IP functionality from its global-flow-related features. In the rest the paper, we outline solution directions for the three fundamental challenges described above. Our solutions are at different degrees of maturity, ranging from ideas and proof-of- concepts to methods that are deployed on real products. We expect these solution directions to mature and expand over time. Our belief is that there is no single “silver bullet” solution that addresses all challenges.