NEW HIGH PERFORMANCE CMOS DIFFERENTIAL CURRENT CONVEYOR REALIZATION Sinem Çiftçioğlu Hakan Kuntman Ali Zeki e-mail: sinem@ehb.itu.edu.tr e-mail: kuntman@ehb.itu.edu.tr e-mail: alizeki@ehb.itu.edu.tr Istanbul Technical University, Faculty of Electrical and Electronics Engineering, Department of Electronics & Communications Engineering, 34469, Maslak, Istanbul, Turkey Key words: CMOS current conveyors, CCII, DCCII ABSTRACT New CMOS realization of high performance differential current conveyor (DCCII) is presented. Presented high performance differential current conveyor is a useful analog building block with the advantage of wide bandwidth. It can be directly used with MOS transistors operating in the ohmic region to implement some essential analog functions. As the applications of the presented DCCII, a four quadrant current multiplier and a mixed mode second order bandpass filter are presented. SPICE simulations show that the performance of the DCCII and the multiplier/bandpass-filter are in good agreement with theoretical results. I. INTRODUCTION The first generation current conveyor (CCI) was presented by Sedra and Smith in 1968. They presented the second generation current conveyor in 1970. However, a certain work to show that the current conveyor was a more advantageous device than the operational amplifier, couldn’t be done during following ten years. So, the current conveyor had been a conceptual device until early 1980s. After innovations in integrated circuit (IC) technology it was seen that the current conveyor can be realized in ICs simply. In the result of these works, it was understood that the circuits which are implemented by using CCIIs have important advantages. Really, many circuit blocks can be implemented by using CCIIs easier than using Op-Amps. The differential current conveyor (DCCII) is a powerful current-mode building block with properties that make it very suitable for designing all-MOS analog circuits which can be integrated on a single chip. The presented analog block is an extension to the second generation current conveyor presented by Sedra and Smith [1]. Although the CCII can be used to realize many analog functions, the circuits employing the CCII often rely on floating resistors and capacitors which, when integrated on the chip, bring many problems associated with parasitics, area consumption, temperature dependency, etc. The presented differential current conveyor, on the other hand, can be used with MOS transistors operating in the ohmic region to implement the required analog functions where the even and -in some cases- the odd nonlinearities associated with the transistors operating in this mode can be cancelled out. In this paper, after briefly recalling the basic properties of the differential current conveyor, a new high performance CMOS realization of the suggested block is proposed. Application examples are also supplied, which are four quadrant multiplier cells and mixed mode MOSFET-C continuous time filters. II. DIFFERENTIAL CURRENT CONVEYOR The differential current conveyor is a four-terminal analog building block as shown in Figure 1. Describing matrix of the DCCII is given in equation (1). The MOS realization of the DCCII is shown in Figure 2. All transistors are assumed to be operating in the saturation region. As shown in Figure 2, the input currents I X1 and I X2 are applied to the drain of transistors M 12 and M 14 , respectively. The Y terminal voltage is applied to the gate of transistors M 2 and M 5 . Because of M 1 , M 2 , M 5 and M 6 are matched transistors, the voltage at Y terminal is conveyed to the terminals X 1 and X 2. I Z1 I Z2 Z1 I X2 X2 X1 V Y I X1 Z2 Y Fig. 1 DCCII symbol