Indian Journal of Science and Technology, Vol 8(20), DOI: 10.17485/ijst/2015/v8i20/78367, August 2015 ISSN (Print) : 0974-6846 ISSN (Online) : 0974-5645 * Author for correspondence 1. Introduction Applications like DSP, 2D and 3D graphics, Computer- Aided Design (CAD), virtual reality and three dimensional graphics requires the computation of the basic elementary mathematical functions. Special function unit is a hardware module exclusively for the computation of elementary functions. Graphics Processing Units (GPUs) ought to have the capacity to perform billions of operations every second 1,2 . Modern day applications demand high performance operations of the order of billions of functions per second. So 3-D graphics is an opportunity for the future embedded technology applications or the System-on-Chip (SoC). In a nut shell the graphics processor must have high speed, high efciency in terms of area and power 3 . In modern GPUs the fexibility and high rendering rates are a necessity for implementing various sophisticated 3-D algorithms. To fulfl this, the GPUs make use of very powerful programming processors, known as shaders. Shaders are profcient to execute the every vertex, every pixel reckonings of the 3-D data pipeline in an exceptionally adaptable way 1-4 . Shaders are ft for executing projects with branches, iterations and element stream control. Shaders computes the elementary functions like inverse, square root, logarithm, exponential, etc along with addition and multiplication. For proper rendering of million vectors per second, Special Function Units (SFU) for the basic elementary functions are incorporated in advanced GPUs. SFUs for elementary function computation must be of high speed in nature 6-13 . Accuracy prerequisite requirement is a matter of importance for SFUs in addition to speed. Area and power are compromised for accuracy in 8-10 where fxed-point implementations are presented. However foating-point implementations 1 are required in high end graphics systems where maximum visual realism has to be achieved. Abstract Objectives: Designing a highly accurate high speed low area Special Function Unit (SFU) is the objective of this work. 32 bit IEEE-754 floating point data format is supported in this system. Methods: The SFU implements elementary functions like inverse, exponential, inverse square root, square root and logarithm accurately. The unit can be utilized in programmable graphics processors where high performance and high accuracy evaluation is needed. The coefficients of the elementary functions are optimized by Genetic algorithm. The simulations were carried out in Xilinx EDA tool and MATLAB. Synthesis reports were taken from Cadence RTL compiler. Findings: Coefficient optimization and extraction is done using genetic algorithm by doing curve fitting with a second degree polynomial. There is a significant reduction around 40% in the area when constraint piecewise quadratic genetic approximation scheme is used. The number of iterations performed in optimization algorithm is 104. The percentage of error is 0.2578 %. The circuits operated at a frequency of 228MHz and the power dissipation was found to be 3.94 mW. This results in a highly accurate SFU. Conclusion: A significant advantage in area when compared to other previous techniques is obtained. The SFU can be utilized in programmable graphics engine. Keywords: Elementary Functions, Graphics Processor, Special Function Unit (SFU), Single Precision Computation Floating Point High Performance Low Area SFU Shibin K. Hassan 1* and P. Reena Monica 2 1 School of Electronics Engineering, VIT University, Chennai Campus, Chennai - 600127, India; shibin hassan2013@vit.ac.in 2 School of Electrical Engineering, VIT University, Chennai Campus, Chennai - 600127, India; reenamonica@vit.ac.in