ELSEVIER Microelectronic Engineering 46 (1999) 183-186 ~cRo~r..--c=~o~ric Hot Electron Emission Lithography: a method for efficient large area e-beam projection M. Poppeller, E. Cartier, R.M. Tromp IBM Research Division, T.J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York, 10598, USA We have developed an electron lithography method, Hot Electron Emission Lithography (HEEL), which is capable of printing integrated circuits with an exposure time of only a few seconds. The basic design of the mask, manufactured by standard MOS technology, will be discussed. Patterns printed into e-beam resist by a 1:1 projection system show the applicability of the mask for lithography purposes. The minimum feature size projected so far is 160 nm in a system capable of 90 nm resolution. Further improvements in resolution to 50 nm are possible 1. Introduction Shrinking the dimensions of integrated circuits is still one of the main driving force for higher chip performance and lower cost. The need for alternative techniques in lithography is driven by the knowledge that conventional optical lithography will not print feature sizes smaller than 100 nm. Most of these methods use either x-rays or electrons to interact with the resist material. Conventional x-ray lithography (1,2) is the most developed alternative techniques, but it requires high investment costs for the source and encounters problems in the mask making and handling. E-beam writing is the only proven alternative to optical lithography, but low throughput makes it unacceptable for modern wafer manufacturing plants. Alternative techniques for industrial application, like ion beam lithography (3), are still under development. To overcome speed issues of direct electron beam writing, e-beam projection techniques such as SCALPEL (4,5) are under development. Alternatively, 1:1 projection systems using various types of patterned electron sources have been investigated. A feasibility study for a photoemission mask has been presented (6). Another approach is based on the use of Metal- Insulator-Metal (MIM) tunnel cathodes (7). In this paper we present our results using a so called hot electron mask (HEM), based on a tunnel cathode formed by a Metal-Oxide-Semiconductor (MOS) junction fabricated by standard MOS technology. Such masks offer low manufacturing costs, good emission properties and promise long lifetime. The idea to use such masks was patented some time ago (8) but to our knowledge it has not been reduced to practice, possibly because of difficulties in mask manufacturing. The last decade, however, has seen tremendous progress in the controlled fabrication, uniformity and reliability of thin gate-oxides. Furthermore recent high resolution, real space imaging of electron emission from MOS structures and studies of the emission characteristics (9) were sufficiently promising to pursue the use of hot electron masks in lithography. We give a short description of our mask design and fabrication and of the projection system used to test the usefulness for lithography. We will present results on printing 160 nm lines in e-beam resist. 2. Mask design and fabrication The hot electron emission mask is based on a MOS tunnel structure. The thin, partially electron transparent metal layer on top of the mask is used as a gate electrode. When this electrode is positively biased with respect to the silicon substrate, electrons will tunnel from the substrate into the oxide where they are balisticaly accelerated. Some of these hot electrons pass through the thin gate metal and are emitted into vacuum as a source for lithography. Mask patterning can be performed in various ways. Our approach is schematically compared to previous methods in Fig. 1. Delong and Kolarik (7) used a MIM structure as shown in Fig. la. Emission contrast is obtained by suppressing the electron 0167-9317/99/$ - see front matter © 1999 Elsevier Science B.V. All rights reserved. PII: S0167-9317(99)00058-1