micromachines Article Gateless and Capacitorless Germanium Biristor with a Vertical Pillar Structure Hagyoul Bae 1,2,† , Geon-Beom Lee 2,† , Jae Hur 3 , Jun-Young Park 4 , Da-Jin Kim 2 , Myung-Su Kim 2 and Yang-Kyu Choi 2, *   Citation: Bae, H.; Lee, G.-B.; Hur, J.; Park, J.-Y.; Kim, D.-J.; Kim, M.-S.; Choi, Y.-K. Gateless and Capacitorless Germanium Biristor with a Vertical Pillar Structure. Micromachines 2021, 12, 899. https://doi.org/10.3390/ mi12080899 Academic Editor: Eun Kwang Lee Received: 29 June 2021 Accepted: 27 July 2021 Published: 29 July 2021 Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affil- iations. Copyright: © 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/). 1 School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA; hagyoulbae@gmail.com 2 School of Electrical Engineering, KAIST, 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea; rjsqja1@kaist.ac.kr (G.-B.L.); dajin1202@kaist.ac.kr (D.-J.K.); mskim9993@kaist.ac.kr (M.-S.K.) 3 School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA; jhur45@gatech.edu 4 School of Electronics Engineering, Chungbuk National University, Chungdae-ro 1, Cheongju, Chungbuk 28644, Korea; junyoung@cbnu.ac.kr * Correspondence: ykchoi@ee.kaist.ac.kr; Tel.: +82-42-350-3477 † Hagyoul Bae and Geon-Beom Lee contributed equally to this work. Abstract: For the first time, a novel germanium (Ge) bi-stable resistor (biristor) with a vertical pillar structure was implemented on a bulk substrate. The basic structure of the Ge pillar-typed biristor is a p-n-p bipolar junction transistor (BJT) with an open base (floating), which is equivalent to a gateless p-channel metal oxide semiconductor field-effect transistor (MOSFET). In the pillar formation, we adopted an amorphous carbon layer to protect the Ge surface from both physical and chemical damage by subsequent processes. A hysteric current-voltage (I-V) characteristic, which results in a sustainable binary state, i.e., high current and low current at the same voltage, can be utilized for a memory device. A lower operating voltage with high current was achieved, compared to a Si biristor, due to the low energy bandgap of pure Ge. Keywords: Ge biristor; vertical memory; amorphous carbon layer; gateless structure; capacitorless structure; DRAM 1. Introduction As memory devices continue to be scaled down for high density integration, the conventional 1-transistor and 1-capacitor dynamic random-access memory (1T/1C DRAM) cell used for large storage capacity is facing process challenges. As the cell size shrinks, the aspect ratio of the cell capacitor enormously increases and the junction leakage current deteriorates [1,2]. Furthermore, reliability issues induced by off-state stress and bias- temperature instability (BTI) impede cell functionality such as on-state current (I ON ) and off-state leakage (I OFF )[3]. In order to solve these technological limitations, the floating body-based dynamic random-access memory (DRAM) cell with a capacitorless structure has been under active research and development to improve fabrication simplicity and cell area scalability [4–6]. Such DRAM has at least three terminals: gate, source, and drain. For further aggressive scaling with a more simplified structure, a bi-stable resistor (biristor) composed of two terminals: source (emitter) and drain (collector) was reported for a gateless volatile memory device. From a structural point of view, such a biristor is categorized into two groups. One is a planar structure that was implemented on a silicon-on-insulator (SOI) wafer [7,8] for a floating body and the other is a vertical structure that was fabricated on a bulk-Si wafer [9,10]. In the vertical biristor, a p-type floating body located at the middle of the pillar was inherently made by n-type junctions positioned at a top and bottom of a pillar. Herein, the top electrode is a collector (drain), the bottom electrode is an emitter (source), and the middle floating body is a base (channel). On the Micromachines 2021, 12, 899. https://doi.org/10.3390/mi12080899 https://www.mdpi.com/journal/micromachines