FPGA-based gating and logic for multichannel single photon counting R. C. Pooser, D. D. Earl, P. G. Evans, T. S. Humble Oak Ridge National Laboratory Oak Ridge, TN 37831, USA We will present our results characterizing multichannel InGaAs single photon detectors utilizing gated passive quenching circuits (GPQC), self differencing techniques, and field programmable gate array (FPGA)- based logic for both diode gating and coincidence. Utilizing FPGAs for the diode gating frontend and the logic counting backend has the advantage of low cost compared to custom built logic circuits and current off-the-shelf detector technology, and they have been shown to work well in QKD test beds [1]. Our setup combines multiple independent detector channels in a reconfigurable manner via an FPGA backend and microcontroller analyzer in order to perform coincidence measurements between any two or more detector channels simultaneously. Using this method, states from a multi-photon polarization entangled source can be detected. In a slightly different configuration, the FPGA backend also serves as the logic analysis for a wavelength division multiplexed QKD setup, in which multiple channels are in use simultaneously (up to two channels per user). Previous work has shown that GPQCs can utilize both sinusoidal shaped [2] and square shaped [3] gate pulses. In addition, both methods can be used with self differencing circuits in order to remove the diode capacitive response [4]. We will provide details on the FPGA frontends and backends for each scenario, highlighting the configurability, as well as technical details regarding our experiences with building InGaAs SPADs into these FPGA based single photon detectors. We have utilized square wave gates, sine wave gates, and self differencing circuits or band elimination filters, or both in tandem. In our specific case, high speed photo detection is not as critical as in other applications (where gates of 1.5GHz and above are state of the art) due to the repetition rate of our laser (76 MHz). Nonetheless, our setup is capable of higher speed detection. An interesting highlight of our setup is the use of FPGA based phase-locked-loops (PLLs) to provide the gate circuit. Using this method moves much of the difficulty of design into the software domain. However, standard FPGA demo boards usually will not suffice for such outputs, despite the chip itself possessing the capability. For a square wave of any reasonable frequency and rise time, a custom board with tight impedance matching tolerances needs to be designed for the FPGA in question. Rise times of hundreds of picoseconds can be achieved with square waves of several hundred MHz with 1-3 V amplitude. Circuits approximating sine wave gates can be made from FPGA PLLs, despite their only being capable of digital logic, by shaping the output impedance appropriately. The other main motivation for FPGAs is multichannel analysis. Our setup can take multiple channel inputs and evaluate coincidences between any two or more. Figure 1 below shows examples for FPGA based photo detection in two scenarios: time stamped detection for time interval processing of coincidences, and multichannel coincidence detection. Not shown are the clock delay circuits, built into the FPGAs as well. Fig. 1. Left Top: SPAD gate from FPGAs; our setup uses a 76 MHz base clock and 3 time bins per pulse, resulting in a 228 MHz gate. Left Bottom: Example time stamping setup, comparing a fast universal clock signal with photon arrival pulses. Right: Example multichannel setup using configurable FPGAs as comparators. References [1] M. Sasaki et al. “Field test of a quantum key distribution in the Tokyo QKD network,” arXiv:1103.3566v1 [quant-ph] (2011). [2] N. Namekata, S. Adachi, and S. Inoue, “1.5 GHz single-photon detection at telecommunication wavelengths using sinusoidally gated InGaAs/InP avalanche photodiode,” Optics Express 17, 6282 (2009). [3] Z. L. Yuan, B. E. Kardynal, A. W. Sharpe, and A. J. Shields, “High speed single photon detection in the near infrared,” App. Phys. Lett. 91, 041114 (2007). A. Restelli and J. Bienfang, “Investigation of SPAD operation with high-speed sub-nanosecond periodic gating,” presented at SPW2009, Boulder, CO (2009). [4] J. Zhang, R. Thew, C. Barreiro, and H. Zbinden, “Practical fast gate rate InGaAs/InP single-photon avalanche photodiodes,” App. Phys. Lett. 95, 091103 (2009). View publication stats View publication stats