Abstract—In the computer micro-architecture and network research area, developing a device and of network in a real time circumstances is not an easy task. A single device or test bed takes a large amount of time and cost, even not flexible. Therefore production of devices in bulk or operation of a whole network in real world is difficult and very costly too. The simulator supports the device engineer or network developer to assure whether the device or network is able to work efficiently in the real time. Thus both the time and cost of testing the functionality of network have been reduced and implementations are made easy, moreover it gives a chance to optimize the efficiency of the total system. In this paper, we introduce the main features of different microarchitecture and network simulator and consider their advantages and disadvantages, in addition to this we are looking for a simulator that is capable of both the microarchitecture and the network system. Microservers are newly emerging technologies that they are contradictory in low power consumption, very small and dense in their genre of application than the regular server system, which need the simulator that is capable to simulate both microarchitecture and network together. We anticipate this survey paper verify in selection of simulators and be a good resource for those people who feel difficult to select the fitting microarchitecture or network simulators for their research. Index Terms—simulation Technique, Microarchitecture simulator, network simulator. I. INTRODUCTION 1.1 MICROARCHITECTURE AND SIMULATION The processors of microarchitecture have gone through a consistent progression. Microprocessors from various vendors released nearly in each 18 months’ time. . This is because, the vendors try to improve microprocessor’s execution speed as well as load. This efforts may affect architecture complexity. In both aspects of improvement microarchitecture simulation has played substantial role. Simulation is an important technique in computer microarchitecture research, networking and computer science education. The Microprocessor and its components, such as Cache memory, ALU, Control unit, and data path modeling design and their behavior will be done firstly using microarchitecture simulator. The microarchitecture simulation used to explore the design space as well as to evaluate the performance and efficiency of novel microarchitecture features before its hardware implementation. According the micro- architecture type or the task to be done by the simulator we may have different type of simulators which are applicable for different purposes. Microservers also part of newly emerging technologies that need the application of simulators. As system they need both the microarchitecture and network simulators together. In this regard in the near future we will get a new simulator which is opportune for microserver simulation that can simulate both the microarchitecture and the network simultaneously. Microarchitectures can be classified as: Pipelined/Non- pipelined Processors, In-Order/Out-of-Order Processors, Scalar/Superscalar Processors, Vector Processors, Multicore Processors and Multithreaded Processors Similarly simulators are classified depending on the criteria of Input (workload) type which are Trace driven, Execution driven; Scope level which are Full system simulator, Micro- architecture simulator and Network simulator and finally Detail: Cycle accurate and Instruction set simulator. Fig.1 Flow chart for using a simulator [4] This paper organized as first and for most it declares the basic fundamentals of simulations and defines some technical words in microarchitecture and network simulators, then it has selected some popular microarchitecture simulators, thirdly some selected network simulator and see their features, advantages and their limitations, summary and conclusion is made at the last part of the paper. Valuation of Microprocessor’s and Network Simulation Technique Biruk Y. Nidaw* § , Ziho Shin* § , Hag Young Kim § , Young Woo Kim* § *Department of Computer Software and Engineering, University of Science and Technology (UST), 217 Gajeong-ro Yuseong-gu, Daejeon, (305-350), KOREA § SW Content Research Laboratory Electronic and Telecommunication Research Institute (ETRI), 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, KOREA (biruky, zshin, bartmann, h0kim)@etri.re.kr