IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 58, NO. 2, FEBRUARY2009 397 A Resistance Deviation-to-Pulsewidth Converter for Resistive Sensors Hoon Kim, Won-Sup Chung, Hee-Jun Kim, Senior Member, IEEE, and Sang-Hee Son Abstract—A resistance deviation-to-pulsewidth converter is presented for interfacing resistive sensors. It consists of a ramp integrator, two resistance-tunable Schmitt triggers, and two logic gates. A prototype circuit built using discrete components exhibits a resolution as high as 14 bits and a linearity error less than ±0.06% when the output pulse is counted by a 10-MHz clock signal. The proposed circuit is applied to measure the temper- ature difference with the platinum resistance temperature de- tectors. The measured conversion sensitivity of the temperature difference-to-pulsewidth converter is 5.74 μs/ ◦ C, and its linearity error is less than ±1% in the temperature difference range of 0 ◦ C to 100 ◦ C. Index Terms—Direct digital readout, resistance-to-time con- verter, resistance-tunable Schmitt trigger, temperature difference- to-pulsewidth converter. I. I NTRODUCTION R ESISTANCE deviation-to-time interval (or frequency) converters are essential building blocks for interfacing resistive sensors with digital systems [1]. Several circuits are available in the literature for realization of such converters. These are usually based on a Wheatstone bridge. In these converters, the resistance deviation between a resistive sensor and a reference resistor is converted into its corresponding offset voltage via a Wheatstone bridge; this offset voltage, in turn, is converted into frequency by various oscillator circuits [2]–[6] or into a time interval by pulsewidth modulators [7], [8]. To obtain high accuracy, a precision differential integrator (or amplifier) is required in the former approach, whereas precision and matched pulsewidth modulators are required in the latter method. In this paper, a resistance deviation-to-pulsewidth (RD-to- PW) converter with simple configuration and high accuracy is presented. It consists of a ramp integrator, two resistance- tunable Schmitt triggers, and two logic gates. The design principle is to apply a ramp voltage to each input of the two Manuscript received March 22, 2007; revised May 19, 2008. First published September 5, 2008; current version published January 5, 2009. This work was supported by the Korean Research Foundation Grant funded by the Korean Government [The Regional Research University Program/Chungbuk BIT Research-Oriented University Consortium (MOEHRD)]. H. Kim is with the Department of Electronics, Electrical, Control, and Instrumentation Engineering, Hanyang University, Ansan 426-791, Korea (e-mail: hooniga76@yahoo.co.kr). W.-S. Chung and S.-H. Son are with the Department of Semiconductor Engineering, Chongju University, Chongju 360-764, Korea (e-mail: circuit@ chongju.ac.kr; shson@chongju.ac.kr). H.-J. Kim is with the Division of Electrical Engineering and Computer Science, Hanyang University, Ansan 426-791, Korea (e-mail: hjkim@hanyang. ac.kr). Digital Object Identifier 10.1109/TIM.2008.2003318 resistance-tunable Schmitt triggers whose threshold voltages are proportional to resistance values. II. CIRCUIT DESCRIPTION AND OPERATION Fig. 1 shows the circuit diagram of the RD-to-PW con- verter. It consists of a ramp integrator, two resistance (or current)-tunable Schmitt triggers, and two logic gates. The upper Schmitt trigger is composed of a voltage comparator, an operational transconductance amplifier (OTA), a reference voltage V R , and a resistor R x . The resistor R x represents a resistive sensor whose resistance change is to be detected. The lower Schmitt trigger is identical to the upper Schmitt trigger, except that R r is used instead of R x . R r is the reference resistor, which is fixed at a specific value and compared with R x . The transfer characteristics of the Schmitt triggers are shown in Fig. 2. It is notable that the threshold voltages of the upper Schmitt trigger are proportional to the resistance of R x , whereas the threshold voltages of the lower Schmitt trigger are proportional to the resistance of R r . To see how the RD-to-PW converter operates, refer to Fig. 3, which shows the signal waveforms at the various nodes of the converter, and assume that both of the Schmitt triggers are at their positive saturation level V CC and that R x is greater than R r . Prior to the start of the conversion cycle, switch S is closed, thus discharging capacitor C and setting the input voltages of the Schmitt triggers v INT to 0 V. The conversion cycle begins by opening switch S. Since the reference current I R flows through the capacitor, v INT linearly rises with a slope of I R /C. When v INT reaches the threshold voltage of the lower Schmitt trigger V TH1 (= V R + I B R r ), the output of the lower Schmitt trigger v SMT1 falls to zero, and the output of the XOR gate v OUT becomes high. Denoting t 1 the time duration for which v SMT1 keeps V CC , we can write t 1 = C I R (V R + I B R r ). (1) The conversion process continues until v INT reaches the threshold voltage of the upper Schmitt trigger V TH2 (= V R + I B R x ). At this instant, the output of the upper Schmitt trigger v SMT2 falls to zero; therefore, v OUT becomes low, and the output of the NOR gate v SW becomes high. Switch S is now closed, thus clamping the voltage v INT to ground. This, in turn, makes the outputs of the Schmitt triggers rise to V CC and v SW go to low. Switch S is now opened, and new conversion process is started. Denoting t 2 the time duration for which v SMT2 keeps V CC , we can write t 2 = C I R (V R + I B R x ). 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