A U T O T E S T C O N 44 IEEE Instrumentation & Measurement Magazine August 2007 A n important trend in the synthetic instrument community is the development of products around the capabilities of Field Programmable Gate Array (FPGA) based embedded proces- sors. It is assumed here that signals arrive at the FPGA input at high data rates, low to medium data bit width, and low to me- dium signal-to-noise ratio. As a consequence of the processing that reduces signal bandwidth, the data bit width is increased in concert with the increased signal-to-noise ratio resulting from the reduced bandwidth. The FPGA has the unique capabil- ity to allocate its internal resources in an optimal way to best match the dynamic range of the sampled data signal at various points in the signal flow path. Since the Fast Fourier Transform (FFT) is primarily a tool in the synthetic instrument, the effect of fixed point arithmetic on its performance is reviewed, and suggested bit width assignments for FFT algorithms are pre- sented. Computational noise in the FFT is due to finite bit width input data, finite bit width sine-cosine tables, finite bit width multipliers and accumulators, and distributed scaling between data passes. The noise generated by these contributors is not uniform over the frequency band and a number of mechanisms to minimize the noise contribution to the measurement process performed by the synthetic instrument are presented. Introduction Digital Signal Processing (DSP) is the technology that makes possible advantageous changes in how signals are collected, processed, stored, and presented in the test and measurement community. DSP is the central frame supporting the on-going development and performance enhancements of synthetic instruments. Synthetic instruments exploit combinations of hardware and software to emulate a variety of dedicated measurement systems. Figure 1 presents a block diagram of a typical data collection and processing system in a synthetic instrument. The signal conditioning at the input to the system entails analog filtering to limit the input bandwidth, automatic gain Finite Arithmetic Considerations for the FFT Implemented in FPGA-Based Embedded Processors in Synthetic Instruments Wade Lowdermilk and Fred Harris 1094-6969/06/$25.00©2006IEEE