Single-Chip 40Gb/s Widely-Tunable Transceivers with Integrated SG- DBR Laser, QW EAM, UTC Photodiode, and Low Confinement SOA J. W. Raring * , L.A. Johansson † , E.J. Skogen † , M.N. Sysak † , H.N. Poulsen † , S.P. DenBaars * , and L.A. Coldren * † * Materials Engineering, University of California, Santa Barbara, CA 93106 † Electrical and Computer Engineering, University of California, Santa Barbara, CA 93106 Phone: 805-893-7163, Fax: 805-893-4500, Email: jraring@engineering.ucsb.edu Abstract We present the first single-chip, widely-tunable 40Gb/s transceivers. The devices integrate sampled grating DBR lasers with electroabsorption modulators, low optical confinement semiconductor optical amplifiers, and uni-traveling carrier photodiodes. I. Introduction The generation, detection, modulation, amplification, and transport of light on a single chip allows for a new generation of high-functionality photonic integrated circuits (PICs) with reduced cost, size, and power dissipation. For these high-functionality PICs to replace discrete components in optical networks, high-yield fabrication methods must be developed to facilitate the optimization of the individual components contained on the chip. In this work we present 40Gb/s monolithic transceivers integrating widely-tunable sampled grating DBR (SG-DBR) lasers with quantum well electroabsorption modulators (QW-EAM), high and low optical confinement semiconductor optical amplifiers (SOA), and uni-traveling carrier (UTC) photodiodes on a single chip. These component structures represent the state of the art technologies for even discrete devices. The fabrication method couples a robust quantum well intermixing (QWI) technique with simple blanket MOCVD regrowth steps and avoids the difficulties associated with selective area growth or butt-joint regrowth [1]. The transmitters demonstrate over 30nm of tuning, low drive voltages (1.5-2.5V PtoP ), and low power penalty transmission through fiber at 40Gb/s [2]. The SOAs within the receivers provided up to 28dB of gain with saturation powers in the 18.5dBm range while the UTC photodiodes facilitated 40Gb/s operation under high photocurrent conditions. Chip-coupled receiver sensitivity better than –20dBm was demonstrated at 40Gb/s. II. Fabrication Device fabrication begins with the MOCVD growth of a centered multiple quantum well (c-MQW) base structure consisting of ten 6.5nm InGaAsP QWs and eleven 8.0nm InGaAsP barriers centered within a 1.3Q waveguide to yield a maximized optical confinement factor of 12.6%. Using the QWI method illustrated in Fig. 1a and detailed in [3], the as-grown c-MQW band-edge ( PL = 1540nm) was blue-shifted in the EAM ( PL = 1505nm) and passive regions ( PL = 1440nm). Following the QWI process, a blanket MOCVD growth was performed for the deposition of a low-confinement offset MQW (o-MQW) gain region. The o- MQW ( PL = 1550nm) contained 5 wells and was designed to have an optical confinement factor of ~1.4%. The FIGURE 1. (a) QWI sequence used for controlled shifting of the c-MQW band-edge. (b) Photoluminescence of the as-grown c-MQW active, partially intermixed c-MQW EAM, severely intermixed c-MQW passive, and regrown o-MQW active regions. (c) Side view schematic of the high confinement c-MQW, low confinement o-MQW, and UTC photodiode regions. (d) Top-view SEM image of 0.5 by 3.5mm 2 transceiver device.