The Probabilistic Modeling of Random Variation in FGMOSFET Rawid Banchuin Department of Computer Engineering Siam University Bangkok, Thailand line 4-e-mail address if desired << Remove all author names before submission! >> Roungsan Chaisricharoen School of Information Technology Mae Fah Luang University Chiangrai, Thailand line 4-e-mail address if desired Abstract— The probabilistic modeling of the random variation in drain current of the Floating-Gate MOSFET (FGMOSFET) has been performed in this research. Major physical level causes of random variations such as random dopant fluctuation and line edge roughness have been taken into account. The result has been found to be very efficient since it can accurately fit the probabilistic distributions of normalized random drain current variations of the candidate FGMOSFETs obtained by using the Monte-Carlo SPICE simulation based on BSIM3v3 at 0.25μm level with very high level of confidence. By using such result, many beneficial parameters can be formulated and the probabilistic modeling of the variation in FGMOSFET based circuit is possible. So, the result obtained from this modeling has been found to be beneficial the statistical/variability aware analysis/designing of any FGMOSFET circuit and system. Keywords— FGMOSFET; Probability density function; Probabilistic modeling; Statistical/variability aware analysis/ designing I. INTRODUCTION FGMOSFET has been widely utilized in various analog/digital circuits, systems and applications for examples, those proposed in [1]-[14]. Similarly to the ordinary MOSFET based counterparts, the performances of the FGMOSFET based circuits, systems and applications have also been deteriorated by the circuit level random variations induced by the physical level nonidealities which the major ones are such as random dopant fluctuation and line edge roughness. In order to handling this situation, the designing of many FGMOSFET based circuits, systems and applications have been performed by using the concept of the statistical/variability aware design for examples, those proposed in [4] and [15]-[21] etc. Since the key circuit level parameter is the drain current (I D ) for both ordinary MOSFET and FGMOSFET because the variations in others can be conveniently determined by using the variation in I D (ΔI D ) as the basis, analytical modeling of ΔI D have been performed in previous researches for example, [22], [23]. Obviously, analytical modeling of variation in any circuit level parameter which is beneficial to the statistical/variability aware analysis and designing can be performed based on the results obtained from such modeling which are unfortunately devoted only to the ordinary MOSFET. For the FGMOSFET on the other hand, it can be seen from many previous researches such as [24]-[32] etc., that the studies have been mostly performed in the case by case manner So, the obtain results are not generic as they are applicable only to their corresponding circuits. Hence, probabilistic modeling of ΔI D of the FGMOSFET has been performed in this research. As a result, the probability density function of the normalized value of ΔI D with respected to I D (ΔI D /I D ) has been formulated. The modeling process has taken the dominant physical level causes of circuit level random variations for example, random dopant fluctuation and line edge roughness into account. The resulting probability density function has been found to be generic since it has been regarded to a single FGMOSFET. So it can be extensively applied to any FGMOSFET based circuit. Such probability density function is very accurate as it can fit the probabilistic distributions of ΔI D /I D of the candidate FGMOSFETs of both N-type and P-type obtained by using the Monte-Carlo SPICE simulation with 99% level of confidence. So, this work has been found to be beneficial to the statistical/variability aware analysis/designing involving FGMOSFET. II. THE OVERVIEW OF FGMOSFET FGMOSFET is a special type of MOSFET with an additional gate which is completely isolated within the oxide, namely the floating gate [11]. A cross sectional view, symbol and equivalent circuit model of an N-type FGMOSFET with N inputs can be depicted in Fig.1-3. Let {i} = {1, 2, 3,…, N}, it can be seen that C i denote the capacitance between any ith input and the floating gate. Since the capacitive coupling ratio of any ith input (k i ) can be defined as [2, 11]  = = N i i i i C C k 1 (1) Obviously, I D of the FGMOSFET can be given by 2 1 ) ( 2 t S N i i i ox D V V V k L W C I - - μ =  = (2) 978-1-4673-9749-0/16/$31.00 ©2016 IEEE