Characterization of silicon wafer bonding for Power MEMS applications $ Arturo A. Ayo Ân a , Xin Zhang b,* , Kevin T. Turner c , Dongwon Choi c , Bruno Miller c , Steven F. Nagle c , S. Mark Spearing c a Sony Semiconductor, 1 Sony Place, San Antonio, TX 78245, USA b Department of Manufacturing Engineering and Fraunhofer USA Center for Manufacturing Innovation, Boston University, Boston, MA 02215, USA c Gas Turbine Laboratory, Massachusetts Institute of Technology, Cambridge, MA 02139, USA Abstract This paper reports the investigation of low-temperature silicon wafer fusion bonding for MEMS applications. A bonding process utilizing annealing temperatures between 400 and 1100 8C was characterized. The silicon±silicon bonded interface was analyzed by infrared transmission (IT) and transmission electron microscopy (TEM) and the bond toughness was quanti®ed by a four-point bending±delamination technique. # 2003 Elsevier Science B.V. All rights reserved. Keywords: Low temperature; Wafer bonding; Power MEMS 1. Introduction Silicon wafer level fusion bonding has been identi®ed as an enabling technology [1,2] applicable in a large variety of MEMS projects and structures [3], for preparing silicon-on- insulator substrates [4] and for demonstrating packaging schemes at the wafer level. Silicon fusion bonding is an attractive approach for fabricating intricate MEMS struc- tures because it eliminates thermal mismatch problems and has the potential to achieve bonds with strengths comparable to that of bulk silicon. This technique is currently being successfully applied in the emerging ®eld of Power MEMS that typically involves complex structures made possible through the dry-etching and bonding of several silicon wafers. For example, the MIT micro-engine project relies on creating reliable structures involving six or more silicon wafers that are fusion-bonded [5]. The technique has also been applied for demonstrating at the micro-scale combustors [6], heat exchangers [7] and rocket engines [8] among other applications. There is, there- fore, an ever-increasing need for understanding and tailoring the processes taking place during wafer bonding to achieve the objectives of microprocessing compatibility and device reliability. Several issues are of relevance to MEMS technologists when considering wafer bonding, namely: wafer to wafer misalignment (see Fig. 1), particulates as well as surface contamination (see Fig. 2), and the ultimate bond strength achieved under prescribed protocols that frequently involve exposing the contacted samples to temperatures as high as 1100 8C. Annealing steps performed at low temperatures to avoid jeopardizing the electrical behavior of active devices or the integrity of thin metallic ®lms are of particular interest in the ®eld. For this purpose we have explored the bonding process for annealing temperatures from 400 to 1100 8C varying surface preparation conditions, residual gas ambient and pressure during wafer contacting, as well as annealing times. 2. Experimental procedures The work was performed with 4 00 , h100i prime, unpat- terned silicon wafers of resistivity 10±20 O cm that under- went an RCA clean prior to contacting. Some pairs were exposed to an additional 1 min, diluted HF±dip (30:1) immediately after RCA. Subsequent to surface preparation the wafers were contacted either in a N 2 oranO 2 ambient at Sensors and Actuators A 103 (2003) 1±8 $ This paper was presented at the 15th IEEE MEMS conference, held in Las Vegas, USA, January 20±24, 2002, and is an expansion of the abstract as printed in the Technical Digest of this meeting. * Corresponding author. Tel.: 1-617-358-2702; fax: 1-617-353-5548. E-mail address: xinz@bu.edu (X. Zhang). 0924-4247/03/$ ± see front matter # 2003 Elsevier Science B.V. All rights reserved. PII:S0924-4247(02)00329-1