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IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY 1
A Multiresolution Time Domain (MRTD) Method for
Crosstalk Noise Modeling of CMOS-Gate-Driven
Coupled MWCNT Interconnects
Shashank Rebelli , Student Member, IEEE, and Bheema Rao Nistala
Abstract—In this paper, the multiresolution time domain
(MRTD) method with its unique features is tailored for modeling
interconnects. To build further credence to this and its profound
existence in the recent state-of-the-art, simulations for inclusive
crosstalk noise, on complementary metal-oxide semiconductor
gate-driven mutually coupled multi-walled carbon nanotube
interconnect lines, using MRTD method and conventional finite-
difference time-domain (FDTD) model for 32-nm technology
are executed. The results demonstrate the dominance of MRTD
model over conventional FDTD in terms of accuracy with respect
to recursive simulations of Synopsys HSPICE tool. An average
error of less than 0.2% is observed in the estimation of dynamic
crosstalk noise analysis. The proposed method is used to model
interconnects with two and three mutually coupled lines and
can be extended for N-coupled lines. The results of the transient
analysis prove the efficiency of MRTD method over HSPICE with
respect to computational time. The proposed method can also be
used to address the issues of electromagnetic compatibility and
electromagnetic interference of on-chip interconnects.
Index Terms—Complementary metal-oxide semiconductor
(CMOS), crosstalk, finite-difference time-domain (FDTD),
HSPICE, multiresolution time-domain (MRTD), multi-walled car-
bon nanotube (MWCNT).
I. INTRODUCTION
O
NE of the traditional interconnect materials used in deep-
submicron very large scale integrated (VLSI) circuits is
copper (Cu). The scaling down of interconnect dimensions has
made surface scattering and grain boundary scattering more
prominent, resulting in increased resistivity of Cu material [1].
In addition to this, the skin effect, electromigration effect, low
thermal and electrical conductivity, small mean free path (MFP),
and limited current density also degrade the performance of an
IC [2], [4]. Therefore, the requirements of new and reliable ma-
terials for integrated circuit (IC) interconnects have increased.
In the recent times, carbon nanomaterials such as carbon nan-
otubes (CNTs) and graphene nanoribbons (GNRs) form one of
the most promising candidates proposed as a substitute for Cu
interconnects in advanced VLSI circuits [5], [6]. CNTs, with
Manuscript received September 28, 2018; revised January 24, 2019; accepted
February 21, 2019. (Corresponding author: Shashank Rebelli.)
The authors are with the Department of Electronics and Communica-
tion Engineering, National Institute of Technology, Warangal India (e-mail:,
s.rebelli@gmail.com; nbr.rao@gmail.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TEMC.2019.2903728
their outstanding thermal and electrical properties, such as high
melting point (3800 K), higher thermal stability, large MFPs,
and the maximum current density (10
10
A/cm
2
) outperform the
conventional Cu interconnect [7].
Based on the physical properties, CNTs are classified into
two types: single-walled CNTs (SWCNTs) and multi-walled
CNTs (MWCNTs) [8], [9]. The MWCNTs have few concentric
shells of rolled-up graphene sheets with their diameter ranging
from few nanometers to tens of nanometers. Based on the chi-
rality of graphene sheets, the SWCNT exhibits either metallic or
semiconducting behavior, whereas the MWCNT exhibits only
metallic behavior [6]. Due to the large diameter and consider-
ing all the shells adequately connected to the metal contacts,
MWCNTs have long electron MFPs and a great number of con-
ducting channels compared to SWCNTs. Although the MWC-
NTs provide similar current-carrying capability as SWCNTs,
they are simpler to fabricate due to their greater control over
the growth process [10]. Therefore, in the present state-of-the-
art, MWCNT has been considered as interconnect to analyze the
signal integrity issues of driver-interconnect-load (DIL) system.
To analyze the signal integrity issues, such as functional
crosstalk and dynamic crosstalk effects, the MWCNT intercon-
nect is evaluated using an equivalent single conductor (ESC)
model [11], [12]. In the recent past, for the analysis of the
crosstalk effects in graphene-based interconnects, many models
have considered a simple linear resistor as a replacement to the
nonlinear CMOS (complementary metal-oxide semiconductor)
driver [13], [15]. This leads to a discrepancy in the results as
about half of the operating time of MOSFET is in the saturation
region, whereas the other half is divided between the cutoff and
the linear regions [16].
Several methods, such as analytical and SPICE solutions,
have been proposed to model a DIL system as reported in
[17]. However, in the present state of the art, most of the
researchers rigorously studied the crosstalk effects based on
the conventional finite-difference time-domain (FDTD) algo-
rithm due to its accuracy [18], [26]. Li et al. [18] and Vob-
ulapuram et al. [19] extended the FDTD method to a non-
linear CMOS driver by considering α-power law model and
n-th-power law model, respectively, to analyze the crosstalk
effects in Cu interconnects. Agrawal and Chandel [20] have
performed crosstalk analysis in current-mode signaling (CMS)-
coupled resistance-inductance-capacitance (RLC) interconnects
driven by a CMOS-gate driver using the FDTD model.
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