A Compact Low Power High Frequency Pulse Generator Amit Krishna Dwivedi, Rishab Mehra, Sarika Tyagi, Aminul Islam Department of Electronics and Communication Engineering Birla Institute of Technology, Mesra Ranchi, Jharkhand, India 835215 amit10011.13@bitmesra.ac.in, rishabmehra03@gmail.com, sarikatyagi72@gmail.com, aminulislam@bitmesra.ac.in Abstract—This paper proposes a compact, low power high frequency trigger pulse generator circuit. Delay-introducing circuit that can incorporate a certain amount of delay during signal processing while maintaining the signal integrity is utilized in the proposed design. This paper evaluates performance of various delay-introducing circuits in terms of different design matrices. Further, this paper exploits the low power consuming delay element to implement the proposed trigger pulse generator. The proposed design generates very high frequency pulses at the cost of negligible power consumption. The effectiveness of the proposed circuit is presented by producing ultra-thin pulses of pulse duration 92.35 ps while consuming power of only 1.502 w. Extensive simulations are carried out on SPICE @ 16-nm predictive technology model to verify the proposed design. Keywords-delay circuits; trigger pulse generator; voltage control delay circuits; cascaded delay circuits. I. INTRODUCTION With the increasing device integration capabilities, timing scale has been also scaled down to picoseconds. Rise time, fall time, delay time, pulse duration, propagation delays and other timing parameters have been proportionately scaled down with the technology. Hence, very accurate and high precise delay models in the order of picoseconds are vital to match current technology requirement. In various signal- processing applications, synchronization of the signals is done by delaying a signal with respect to the other signal [1]. This requires a delay-introducing element capable of inserting desired amount of delay in order to match it with other signals. As the propagation delays of the logic circuits are in the order of picoseconds, precise delay-introducing circuit is desired [2]. Maintaining characteristics of a signal is essential while processing it. For this purpose, various delay-introducing elements are already available in the literature. This paper makes study of these elements to conclude various merits and demerits. Delay can be desirous and undesirous based upon the application. This paper utilizes minimum and precise delay- introducing circuit to implement the proposed trigger pulse generator. Incorporating delays in picoseconds facilitate the proposed circuit to produce trigger pulse of ultra-thin duration, which prevents the dynamic power losses. Further, as researchers are trying to reduce the static power consumption in the circuits to increase the battery life in the portable gadgets, this paper also emphases to reduce the number of transistors required to implement the design. This reduces the static power consumed per transistor. Thus, this paper intends to minimize both static and dynamic power consumption in the proposed pulse generator. Proposed circuit finds application in various communication systems and signal processing applications which require very high frequency trigger pulses that can be generated at low cost in terms of power consumption [3]. As generation of accurate pulses is required even in portable gadgets that rely on battery supply, compact and reliable pulse generator circuit is desirable. In view of above, this paper makes following contributions: 1) Various delay-introducing elements are investigated in terms of power consumption, minimum delay and delay variability. 2) Optimal delay-introducing element is utilized to develop proposed high frequency ultra-thin pulse generator circuit with low power consumtion. To verify the circuit-level models extensive simulation of different design have been performed on SPICE using 16- nm CMOS predictive technology model (PTM) [4]. The rest of the paper is organized as follows. Section II presents comparison of various delay-introducing elements. Section III proposes a proficient use of low power consuming delay-introducing circuit as high frequency trigger pulse generator. Simulation results are presented in Section IV. Comparison with the existing trigger circuit is presented in Section V. Applications and scope of the work is summarized in section VI. Finally, the concluding remarks are provided in section V. II. VARIOUS DELAY-INTRODUCING CIRUITS In general, the delay-introducing circuits can be classified in different families such as transmission gate based model [5], cascaded inverter based model [5], [6], voltage controlled based model [5-8] and hybrid cascaded inverter based model [3], [9]. The circuit diagram of these delay-introducing elements is shown in Fig. 1. The transmission gate (TG) based delay circuit family consists of two types of circuits – basic TG and TG with Schmitt 2015 Fifth International Conference on Communication Systems and Network Technologies 978-1-4799-1797-6/15 $31.00 © 2015 IEEE DOI 10.1109/CSNT.2015.159 6