357 EFFECT OF GATE DIELECTRIC ON PERFORMANCE OF POLYSILICON THIN FILM TRANSISTORS. Miltiadis K. Hatalis*, Ji-Ho Kung*, Jerzy Kanicki**, and Arthur A. Bright**. *Lehigh University, Dept. of Computer Science and Electrical Engineering, Bethlehem, PA 18015 **IBM Research Division, T. J. Watson Research Center, Yorktown Heights, NY. ABSTRACT The effect of gate dielectric on the electrical characteristics of n-channel polysilicon thin film transistors was investigated. The following insulators were studied: silicon dioxide grown by wet oxidation, silicon dioxide deposited by plasma enhanced chemical vapor deposition (PECVD) and nitrogen-rich silicon nitride deposited by PECVD. It was observed that the effective electron mobility in TFIs having a deposited dielectric, either silicon nitride or silicon dioxide was higher than that measured in devices with grown silicon dioxide. The TFT leakage current was found to be lowest in devices with PECVD silicon nitride. Devices with deposited dielectrics did not degrade after a positive gate bias stress. However, reduction of the threshold voltage was observed in devices with PECVD silicon nitride, when they were subjected to a negative gate bias stress. INTRODUCTION Thin film transistors fabricated in polycrystalline silicon (polysilicon) are being investigated by many laboratories. The motivation behind this active research is the potential use of polysilicon TFTs in flat panel displays, in image sensors and in thermal printer heads. Most of the investigations on polysilicon TFTs have been focusing on the effect of the polysilicon film on the device performance. Two types of polysilicon films have primarily been investigated. The first type of silicon film is deposited in the polycrystalline phase by low pressure chemical vapor deposition (LPCVD) at a deposition temperature around 625'C [1]. The second type of silicon film is deposited by LPCVD in the amorphous phase, and then is crystallized by thermal annealing [2]. It has been shown that the grain size of both types of polysilicon can be engineered by low temperature processes. Grain sizes of the order of one micron have been reported at low process temperatures <600 0 C [31, [4]. The performance of TFTs has been found to depend upon the structure and the grain size of polysilicon and high performance TFTs have been reported in optimized material [5],[6]. Recently, excimer laser crystallization techniques [7] and deposition of large grain size polysilicon by very low pressure CVD [8] have also been reported. Although a lot of emphasis has been given on impoving the quality of polysilicon films, relative little attention has been given on the effect of the gate dielectric and the quality of the polysilicon-gate dielectric interface on the device characteristics. The goal of this work was to study the effect of gate dielectric on the electron mobility, the leakage current, and the stability of the electrical characteristics of n-channel polysilicon TFTs. The following insulators were investigated as gate dielectrics: silicon dioxide grown by wet oxidation, silicon dioxide deposited by PECVD and nitrogen-rich silicon nitride deposited by PECVD. Mat. Res. Soc. Symp. Proc. Vol. 182. 01990 Materials Research Society