1 VHDL-AMS modeling and simulation of BPSK transceiver system Pavel Nikitin, Erik Normark, Cherry Wakayama, and Richard Shi University of Washington, Department of Electrical Engineering, Seattle, WA 98195-2500, USA Email: {nikitin, ecn1, wakayama, cjshi}@ee.washington.edu Abstract—This paper describes a methodology for top-down de- sign, modeling, and simulation of complete RF system using hard- ware description language VHDL-AMS. As a demonstration example, we consider a simple BPSK sys- tem (transmitter, channel, and receiver) and show the details of VHDL-AMS implementation for each elementary block (mixer, os- cillator, amplifier, channel, etc.). Using these behavioral blocks, we simulate our BPSK system and evaluate system performance in the presence of noise. We show that the results of VHDL-AMS simula- tions match both Agilent ADS results and theoretical calculations. This tutorial-like paper together with the developed library of RF blocks is targeted towards engineers who work on behavioral modeling and simulation of complete RF systems using hardware description languages. I. I NTRODUCTION One great challenge in the design of radio frequency (RF) communication system-on-chips is verification and debugging of its functional performance at different de- tail levels: top-level, sub-system level, and circuit level. To be practical, modeling and simulation tools used for that must fit into existing RF, analog, and digital design flows. Flow standards strongly depend on electronic de- sign automation (EDA) companies providing the tools for system level RF simulation (e.g. Agilent ADS or Cadence SPW), analog circuit simulation (e.g., Spectre RF, Hspice), and digital synthesis (VHDL- and Verilog- based). A popular approach to modeling and simulation of complex mixed-signal (digital/analog/RF) systems is be- havioral modeling, which is more time efficient than full circuit-level simulation and is invaluable for verification purposes. Behavioral modeling in modern electronic de- sign flow is commonly performed with high-level hard- ware description languages (HDLs) [1]. Two most often used HDLs are VHDL-AMS [2] (an IEEE standard) and Verilog-A. Major EDA companies already provide design envi- ronments that can incorporate designs written in vari- ous languages, including HDLs (e.g. Cadence AMS Designer or Mentor Graphics ADVance-MS). They also provide libraries of functional blocks that fit into their ap- propriate design flows and allow one to perform simula- tions at different levels of abstraction (behavioral system- level and transistor circuit-level) from the same environ- ment. This is especially valuable when analog circuits are added to previously designed digital blocks. So far there have been very few works published in the area of HDL behavioral modeling and simulation of RF systems. Sida et al. [3] and Ravatin et al. [4] pre- sented results of ADVance-MS simulations for commer- cial transceiver circuits. Knochel et al. [5] performed be- havioral simulations for an 802.11a system in Cadence. The results presented in the above works are strongly dependent on EDA simulation environment, use propri- etary block libraries, and thus cannot be easily shared or run on arbitrary HDL simulators. Fakhfakh et al. [6] and Milet-Lewis et al. [7] reported their recent work on open VHDL-AMS library of RF blocks, but their main focus were phase-locked loop and frequency synthesizer func- tionality issues. In this paper, we concentrate on VHDL-AMS behav- ioral modeling and simulation of a complete RF system, a binary phase-shift keying (BPSK) transceiver, and im- plementation details for various blocks that it is com- prised of. We present our library of simple RF blocks that can be run in any HDL simulator with proper language support functionality. Any additional level of detail can be further added to these blocks, down to the circuit level inclusively. For VHDL-AMS simulations, we use Men- tor Graphics ADVance-MS (ADMS). We also model our system in Agilent ADS (HPtolemy) and compare the re- sults both to VHDL-AMS and to theoretical calculations. II. TRANSCEIVER SYSTEM Consider the following example BPSK transceiver system shown in Figure 1 that consists of a transmitter, an antennas/propagation channel, and a receiver. Binary phase shift keying uses binary polar signals to modulate the phase of the carrier by 180 degrees. Digital data is converted to an analog signal by passing through a 1-bit D/A converter. The analog signal is then up-converted, amplified, and transmitted into the noisy channel. Re- ceived signal is amplified, down-converted, low-pass fil- tered, and converted back into the digital domain. The system uses a modulation frequency of 2.45 GHz and a data rate of 250 Mbps. The power amplifier (PA) and low-noise amplifier (LNA) each have a gain of +10 dBV, and the channel loss is assumed to be -20 dBV. The noise in the channel is varied from -16 dBV to - 4 dBV so that Eb/No values range between -6 dbV and +6 dbV. The BPSK system shown above consists of several