A low power balun LNA with active loads for gain and noise figure optimization I. Bastos • L. B. Oliveira • J. Goes • M. Silva Received: 27 March 2014 / Revised: 17 July 2014 / Accepted: 9 October 2014 / Published online: 21 October 2014 Ó Springer Science+Business Media New York 2014 Abstract In this paper we describe a balun LNA with noise and distortion cancelling with active loads to boost the gain and reduce the noise figure (NF). Simulation and measurements results, with a 130 nm CMOS technology, show that the gain is enhanced by about 3 dB and the NF is reduced by at least 0.5 dB, with a negligible impact on the circuit linearity (IIP3 is about 0 dBm). The total power dissipation is only 4.8 mW, and the active area is less than 50 9 50 lm 2 . Keywords LNA  Active loads  Gain optimization 1 Introduction Modern fully integrated receiver architectures (e.g. Low-IF and Zero-IF), require inductorless circuits to achieve their potential low area, low cost, and low power [9, 13, 16]. The LNA, which is a key block in such receivers, is investi- gated in this paper. Narrowband LNAs [16] use inductors and have very low noise figure, but they occupy a large area and require a technology with RF options to obtain inductors with high Q. Wideband LNAs with multiple narrowband inputs have low noise, but their design is complex and the area and cost are high [13, 16]. RC LNAs are very simple and inherently wideband, but their conventional realizations have large noise figure (NF). Recently, wideband LNAs with noise and distortion cancelling, with passive loads [6, 7] have been proposed, which can have low NF, but have high power consumption. In this paper our main goal is to obtain a very low area, low power, and low-cost LNA. We use the LNA archi- tecture employed in [6], with noise and distortion cancel- ling, which combines a common-gate (CG) stage and a common-source (CS) stage. In [6] the resistor loads are used in these two stages. Here, we replace the resistor loads by MOS transistors, biased in moderate inversion and operating near the transition between triode and saturation, which allows the increase of the LNA gain (for the same voltage drop) and minimizes the circuit NF, without increasing the circuit die area; the active loads allow a supply voltage reduction, which can lead to a very low power consumption. Preliminary simulation results of this circuit have already been presented in the conference papers [3, 4]. In this paper we present an extended version of this work with measurement results. Two circuit prototypes have been designed in a standard 130 nm CMOS technology to compare the conventional design with resistors [6], and the new implementation, with active loads. We demonstrate that the proposed design methodology leads to a gain boost of 3 dB and reduces the NF by 0.5 dB, with a minimum impact on circuit non- linearity. This paper is organized as follows. In Sect. 2 we review the conventional balun LNA with passive loads [6]. In Sect. 3 we propose the use of active loads and present design guidelines to increase the gain and reduce the NF. In Sect. 4 we present the measurement results for the two I. Bastos  L. B. Oliveira (&)  J. Goes Centre for Technology and Systems (CTS of UNINOVA) and Faculty of Sciences and Technology (FCT), Universidade Nova de Lisboa (UNL), Lisbon, Portugal e-mail: l.oliveira@fct.unl.pt I. Bastos e-mail: i.bastos@ieee.org M. Silva INESC-ID Lisboa, 1000-029 Lisbon, Portugal 123 Analog Integr Circ Sig Process (2014) 81:693–702 DOI 10.1007/s10470-014-0426-6