This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES 1 A Compact Ka-Band Integrated Doherty Ampliﬁer With Reconﬁgurable Input Network Duy P. Nguyen , Member, IEEE, Binh L. Pham, and Anh-Vu Pham , Senior Member, IEEE Abstract—In this paper, we present the design of an ultracom- pact monolithic millimeter-wave integrated circuit Doherty power ampliﬁer (DPA) using a novel reconﬁgurable input network at Ka-band. The proposed input network is formed by a compact broadside coupler and two additional ﬁeld-effect transistors. By reconﬁguring the relative phase offset between the main and auxiliary ampliﬁers, the DPA can be postoptimized to achieve high efﬁciency and maximal power gain ﬂatness. More importantly, the DPA can be tuned for the highest performance at different frequencies. To verify the concept, a DPA is fabricated in a 0.15-μm enhancement mode Gallium Arsenide (GaAs) process and exhibits a measured output power of 26.5 dBm and gain of 11.8 dB at 28 GHz. The peak power-added efﬁciency (PAE) is 42%, and the PAE at 6-dB output power backoff (PBO) is 31%, respectively. With reconﬁgurable capability, the DPA can maintain high performance over a 3-GHz frequency band from 26.5 to 29.5 GHz. To the best of the authors’ knowledge, the proposed DPA achieves among the highest backoff PAE over a wide bandwidth at Ka-band. Index Terms— Compact coupler, Doherty power ampliﬁer (DPA), gallium arsenide (GaAs), Ka-band, millimeter-wave integrated circuit (MMIC), reconﬁgurable. I. I NTRODUCTION H IGH peak-to-average ratio of digitally modulated signals in communication systems imposes a critical challenge in radio frequency (RF) power ampliﬁer design [1]. A con- ventional class-AB PA has poor efﬁciency when operated at backoff power levels. A Doherty power ampliﬁer (DPA) is among the most common techniques that improve efﬁciency at backoff power [2]–[10]. In a conventional Doherty ampliﬁer, the output network utilizes two λ/4 transmission lines as impedance transformers, and the input employs a 3-dB power splitter [6], [11]–[13]. In addition, several offset lines are used to align the phases of the signals at the main and auxiliary ampliﬁers so that they are constructively combined at the output. In such architecture, the DPA is bulky, has narrow bandwidth and is sensitive to any phase variation. The Manuscript received March 3, 2018; revised August 13, 2018; accepted September 20, 2018. This paper was presented in part at the 2017 International Microwave Conference, Honolulu, HI, USA, 4–9 June 2017. (Corresponding author: Duy P. Nguyen.) D. P. Nguyen and A.-V. Pham are with the Department of Electrical and Computer Engineering, University of California at Davis, Davis, CA 95616 USA (e-mail: dynguyen@ucdavis.edu; pham@ece.ucdavis.edu). B. L. Pham is with arQana Technologies Ltd., Singapore 569876 (e-mail: lebinh.pham@arqana-tech.com). Color versions of one or more of the ﬁgures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identiﬁer 10.1109/TMTT.2018.2874249 effects of the offset lines and phase matching in the DPA have been well analyzed in [14]–[16]. The authors pointed out that the offset lines play a critical role and need to have a certain phase shift to obtain DPA’s high performance. However, maintaining the optimal phase shift over a wide frequency range is challenging. Therefore, such requirement severely limits the DPA bandwidth. Wideband Doherty ampli- ﬁers have been proposed by either using modiﬁed output combiners [17], [13] or absorbing the device output capaci- tance [18], [19]. Also, voltage-mode Doherty ampliﬁers can provide more desirable bandwidth [20] by changing the output network. However, the input network of the DPAs is still a limiting factor. An alternative approach is to postoptimize bias voltages to reconﬁgure a DPA for different operation conditions. In [8] and [21], the DPA bias voltages are primarily tuned to control the backoff level at which the highest efﬁ- ciency is achieved. Furthermore, [22] demonstrates an active phase shifter in place of a conventional input delay line to optimize for the phase matching in a Q-band complementary metal–oxide–semiconductor (CMOS) DPA. In terms of reconﬁgurable frequency-dependent signals, several DPAs have been reported at frequencies below 7 GHz. Mohamed et al. [23] demonstrated reconﬁgurable output matching networks using microelectromechanical sys- tem switches for both main and auxiliary ampliﬁers in a gallium nitride (GaN) hybrid DPA. The DPA can be recon- ﬁgured for multiband operation at 1.9, 2.14, and 2.6 GHz. In [24], postprocessing optimization was achieved by utilizing additional capacitors and switches at the ampliﬁer input. The DPA employed three switches to perform posttuning and had about 5% efﬁciency improvement at 7 GHz. However, the switches only offer discrete step tuning. In [25], the input power splitter ratio and relative phase are fully controlled by digital circuits to extend the DPA bandwidth. Beyond hybrid GaN DPAs, [26] reports a wideband integrated CMOS DPA at 3.71 GHz by reconﬁguring the phase difference between the main and auxiliary paths using varactor-loaded transmission lines. Recently, the idea has been applied to a 28-/37-/39-GHz reconﬁgurable DPA for 5G applications [27]. Lastly, a digital system has been used in a millimeter-wave DPA to achieve frequency and backoff conﬁgurability [7]. In this paper, we present an integrated single-chip recon- ﬁgurable gallium arsenide (GaAs) millimeter-wave integrated circuit (MMIC) DPA at Ka-band. The reconﬁgurable fea- ture is enabled by an ultracompact broadside coupler in which two terminals are loaded with voltage-controlled 0018-9480 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.