This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY 1 Interposer Technologies for High-Performance Applications Ahmad Usman, Etizaz Shah, Nithanth B. Satishprasad, Jialou Chen, Steven A. Bohlemann, Sajjad H. Shami, Ali A. Eftekhar, and Ali Adibi Abstract—This paper explores the current state of the art in silicon, organic, and glass interposer technologies and their high-performance applications. Issues and challenges broadly encompassing electrical, mechanical, and thermal properties of these interposer technologies are discussed along with the proven and under research solutions pertaining to these challenges. An evaluation of high-performance applications for these three technologies provides a useful insight into the role of interposers for such applications. This paper is an effort to evaluate and compare the viability of silicon, organic, and glass interposer technologies for high-performance applications. This paper also discusses the future trends, promising advancements, and market requirements with special emphasis on glass interposer technolo- gies as evaluated to be the most viable option for the future high-performance applications. Index Terms— Glass interposers, high-performance applica- tions, interposers, organic interposers, packaging, silicon inter- posers. NOMENCLATURE APX Advanced package-X. BEOL Back end of line. BWD Bandwidth density. CPW Coplanar waveguide. CST Computer simulation technology. CTE Coefficient of thermal expansion. CTT Copper trace transfer. DRAM Dynamic random access memory. EIC Embedded interposer carrier. EMIB Embedded multidie interconnect bridge. FEM Finite-element modeling. FOWLP Fan-out wafer-level packaging. FPGA Field programmable gate array. FR-4 Flame retardant-4. GPU Graphics processing unit. HBM High bandwidth memory. HMC Hybrid memory cube. IC Integrated circuit. IoT Internet of Things. Manuscript received May 18, 2016; revised October 17, 2016 and February 1, 2017; accepted February 3, 2017. Recommended for publication by Associate Editor E. D. Perfecto upon evaluation of reviewers’ comments. A. Usman, E. Shah, N. B. Satishprasad, J. Chen, S. A. Bohle- mann, A. A. Eftekhar, and A. Adibi are with the Georgia Institute of Technology, Atlanta, GA 30332 USA (e-mail: ahmadusman@gatech.edu; ahmadusman86@gmail.com). S. H. Shami is with the University of Management and Technology, Lahore 54000, Pakistan. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCPMT.2017.2674686 i-THOP Integrated thin-film high-density organic package. JEDEC Joint Electron Device Engineering Council. KGD Known good die. LCP Liquid crystalline polymers. MEMS Micro electromechanical systems. MFI Mechanically flexible interconnect. PDN Power delivery network. PTE Photo trench etching. RDL Redistribution layers. RF Radio frequency. RFIC Radio frequency integrated circuit. RFID Radio frequency identification. SAP Semiadditive plating. SOP System on package. TGV Through glass via. TPV Through package via. TSV Through silicon via. VIA Vertical interconnection access. WLP Wafer-level packaging. I. I NTRODUCTION T HE demand for ultraminiaturization and megafunctional smart systems has been rapidly increasing. Different SOP realizations have been envisioned and proposed by researchers. Many different material platforms are under consideration for a complete SOP realization. This ultraminiaturization and megafunctionality has led to the increased demand for high density and high bandwidth interconnections, especially between logic and memory chips. The concept of 2.5-D and 3-D IC integration and package is a key component in real- ization toward a complete high-performance SOP solution and the concept itself is incomplete without “interposers.” An “interposer” is an electrical interface (substrate) used for routing between one socket or connection to another socket or connection. In a broader sense, the purpose of an interposer is to spread a connection to a wider pitch or to reroute a connection to a different connection with a different pitch. In the packaging domain, it is an electronic substrate having through VIA interconnections at the same input–output (I/O) pitch as an IC on one of its sides (fine I/Os) and the same I/Os as of packages or boards on the other side (coarse I/Os compared to IC side), to facilitate better integration of multiple chips in a package [1]. Interposers are mainly used for high performance especially high-bandwidth applications, e.g., connecting logic chips 2156-3950 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.