Vol.:(0123456789) 1 3 Applied Physics A (2018) 124:306 https://doi.org/10.1007/s00339-018-1670-x A novel approach for the improvement of electrostatic behaviour of physically doped TFET using plasma formation and shortening of gate electrode with hetero‑gate dielectric Deepak Soni 1  · Dheeraj Sharma 1  · Mohd. Aslam 1  · Shivendra Yadav 1 Received: 12 August 2017 / Accepted: 9 February 2018 © Springer-Verlag GmbH Germany, part of Springer Nature 2018 Abstract This article presents a new device confguration to enhance current drivability and suppress negative conduction (ambipolar conduction) with improved RF characteristics of physically doped TFET. Here, we used a new approach to get excellent electrical characteristics of hetero-dielectric short gate source electrode TFET (HD-SG SE-TFET) by depositing a metal electrode of 5.93 eV work function over the heavily doped source (P+) region. Deposition of metal electrode induces the plasma (thin layer) of holes under the Si/HfO 2 interface due to work function diference of metal and semiconductor. Plasma layer of holes is advantageous to increase abruptness as well as decrease the tunneling barrier at source/channel junction for attaining higher tunneling rate of charge carriers (i.e., electrons), which turns into 86.66 times higher ON-state current compared with the conventional physically doped TFET (C-TFET). Along with metal electrode deposition, gate electrode is under-lapped for inducing asymmetrical concentration of charge carriers in the channel region, which is helpful for widening the tunneling barrier width at the drain/channel interface. Consequently, HD-SG SE-TFET shows suppression of ambipolar behavior with reduction in gate-to-drain capacitance which is benefcial for improvement in RF performance. Furthermore, the efectiveness of hetero-gate dielectric concept has been used for improving the RF performance. Furthermore, reliability of C-TFET and proposed structures has been confrmed in term of linearity. 1 Introduction Downscaling of the MOSFET delivers outstanding device performance in the terms of cost efectiveness, higher ON- state current, and improved Analog/RF performance [1, 2]. Regardless of these advantages, impermissible increment in the OFF-state (leakage) current, limitation of sub-threshold swing (SS) to 60 mV/decade, drain-induced barrier lower- ing (DIBL), and other short channel efects (SCEs) severely afect the device performance in MOSFET with downsizing in sub-nano-meter region [2–4]. Therefore, to overcome above-mentioned problems, tunnel feld-efect transistor (TFET) has been introduced as a perfect substitute of MOS- FET. The most attractive features of tunnel feld-efect tran- sistor (TFET) are low leakage current, lower sub-threshold swing (< 60 mV/decade at room temperature), and scaling down the device dimensions without degrading the device performance, makes TFET an appropriate device for low- power applications [4–6]. However, with all these abilities TFET faces the serious concerns of low ON-state current [2, 7], negative conduction (ambipolar) [8, 9] and degraded high-frequency response [10, 11]. The carrier transport mechanism of TFET is based on band-to-band tunneling (BTBT) phenomenon, in which the electrons penetrate the barrier at source–channel junction and enter to conduction band of channel from the valance band of source region. The probability of tunnelling of charge carriers at source–channel junction increases with decrease in barrier width [12, 13]. At the same time, in ambipolar state, current fows due to the tunnelling of charge carrier at the drain–channel junction. Such unde- sired tunneling of charge carriers (holes for NTFET) can * Deepak Soni deepaksoni09@gmail.com Dheeraj Sharma dheeraj24482@gmail.com Mohd. Aslam mohd.aslam22d@gmail.com Shivendra Yadav shivendra1307@gmail.com 1 PDPM, Indian Institute of Information Technology, Design and Manufacturing, Jabalpur, India