Published in the 13th Scientific Conference of Al-Ma'moon University College -18 April 2012 – Baghdad , Iraq ١ IMPLEMENTATION OF A SIGMOID ACTIVATION FUNCTION FOR NEURAL NETWORK USING FPGA Thamer M.Jamel Ban M. Khammas Electrical Engineering Department Information Engineering College University of Technology Al –Nahrain University Baghdad, Iraq Baghdad, Iraq thamerjamel@yahoo.com banmoh_79@yahoo.com dr.thamerjamel@uotechnology.edu.iq Abstract In this paper, the design of a single neuron which contains a sigmoid activation function was proposed and implemented using the FPGAs (Field Programmable Gate Array) techniques. The main goal of this neuron design is to enable use of any numbers of this neuron that its activation function type is sigmoid function. Furthermore, its goal is design any neural network with any number of hidden layers with a different number of this neuron and any number of output neurons, in easy manner using FPGA. Therefore, this implementation neuron can be use in any application that requires FPGA technique. A single neuron is designed using a schematic editor on Xilinx Foundation Series. Keywords : FPGA, Neural Networks, Sigmoid Activation Function, Schematic Tools. I. INTRODUCTION Neural networks have been used broadly in many fields, either for development or for application. They can be used to solve a great variety of problems that are difficult to be resolved by other methods. ANN has been used in many applications in science and engineering. [1] Although, neural networks have been implemented mostly in software, hardware versions are gaining importance. Software versions have the advantage of being easy to implement, but with poor performance. Hardware versions are generally more difficult and time- consuming to implement, but with better performance than software versions. [2] Most of the design neural network was done in AHDL (Altera's TM Hardware Description Language) and VHDL [3-16]. Researchers now days are looking forward to implementing ANN in reconfigurable to obtain hardware versions of neural network estimators. Recently, several FPGA-based machines have been designed and built. These machines