978-1-4799-2751-7/13/$31.00 ©2013 IEEE A New Design Technique of OTA Based M-ary Modulator and Demodulator Ritika Das,Surya Prakash Tamang, Mousumi Bhanja,Kasturi Ghosh and Baidyanath Ray Dept. of Electronics and Telecommunication Engineering Bengal Engineering and Science University, Shibpur Howrah-711103, W.B, India Abstract—A new OTA based structure of M-ary modulator & demodulator have been proposed in this paper. Unlike conventional system, A/D, D/A converters are not used in the proposed circuit. M-ary ASK modulator and demodulator are synthesized in a systematic and hierarchical manner. As a result, modulation and demodulation with different symbol size, M=2 n where n=1, 2, 3, 4 can be performed in this proposed methodology. Theoretical analysis of bit error rate for the QASK and M-ary ASK has been done. The M-ary ASK modulator has been simulated using SPICE. The simulation results confirm the reliability and accuracy of the design. Keywords — Amplitude Shift Keying (ASK), M-ary modulation and demodulation, QASK, OTA. I. INTRODUCTION M-ary modulation schemes are widely used in digital communication systems. For example, M-ary ASK is used in OFDM systems, biomedical applications [1] etc. Different bandwidth efficiency at the expense of power efficiency can be achieved using these M-ary modulation schemes. This paper presents a generalized modulation and demodulation scheme with minimum number of components. The continuous-time current-mode signal processing is attractive because it allows high-frequency low-voltage operation.Especially in low voltage circuits, the voltage domain behavior suffers due to the threshold voltage of the devices [2]. The use of current rather than voltage as the active parameter can result considerable improvement in usable gain, speed, accuracy and band-width due to reduced voltage excursion at sensitive nodes [2]. A current-mode approach is not just restricted to current processing, but also offers certain important advantages when interfaced to voltage-mode circuits [3]. Different communication circuits have been proposed using current-mode devices through years [4-5]. A generalized design methodology for OTA based currentmode Radio Frequency (RF) communication circuits like Phase Lock Loop (PLL),Adaptive Delta Modulator (ADM) and data compressor has been proposed in [4]. Liang et. al proposed a demodulator circuit for ASK using a single-to-differential OTA, a current mode full-wave rectifier, a log-domain peak detector, a variable-gain amplifier and a comparator [1]. The design technique for a high speed sixth order bandpass continuous-time sigma-delta modulator has been presented in [5]. Pulse Width Modulation Circuits Using CMOS OTAs has been presented in [6]. OTA-Based High Frequency CMOS Multiplier and Squaring Circuit have been proposed by Hidayat et. al [7]. In this background, a new, efficient OTA based ASK modulator and demodulator design methodology has been proposed in this paper. In this paper, the D/A converter used in the conventional ASK modulator circuit has been replaced by an OTA based level converter which converts n bit binary signal to 2 n voltage levels to overcome the limitations of settling time and resolution for high frequency signals.Also the A/D converter used in the conventional demodulator circuit has been replaced by the OTA based detector circuit to overcome the problems of circuit complexity, high power dissipation, and comparator and reference mismatch. Different sections of this paper are laid out as follows. The Design methodology has been discussed in section-II. Calculation of bit error rate is done in section-III. Comparative analysis and simulation results are discussed in section-IV and section-V respectively. II. DESIGN METHODOLOGY In this section, new design methodology for M-ary ASK modulator and demodulator are discussed. A. M-ARY ASK MODULATION Instead of giving binary digits directly, the information sequence can be subdivided into n/2 number of blocks, where M=2 n . With 2 bits per block, there are 2 2 =4 distinct voltage levels per block and hence, total (2 2 ) n/2 = 2 n = M different amplitude levels which are required in order to transmit n bit information unambiguously. This is the basic philosophy of M-ary modulation. Block diagram of M-ary ASK modulator is shown in Fig.1, where real time serial data are converted to parallel data by serial to parallel converter. Parallel binary data are then converted to analog signal by digital to analog converter. 2013 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) 268