IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 5, NO. 1, JANUARY 2015 57 Experimental Characterization of Hybrid Solid-State and Fluidic Cooling for Thermal Management of Localized Hotspots Vivek Sahu, Yogendra K. Joshi, Fellow, IEEE , Andrei G. Fedorov, Je-Hyeong Bahk, Xi Wang, and Ali Shakouri Abstract—A hybrid cooling scheme utilizing superlattice coolers (SLCs) along with microchannel heat sink for thermal management of hotspots is presented. In this paper, we have studied the effect of operating and design parameters on the performance of the SLC. We have also experimentally inves- tigated the effect of interface thermal resistance as well as thermal resistance between the ground electrode and superlattice using two test configurations: one with on-chip microchannels and another with off-chip microchannels. We demonstrated heat removal capability at the localized hotspots of more than over 300 W/cm 2 . Index Terms— Hotspot cooling, hybrid cooling, microchannel heat sink, superlattice cooler (SLC), thermal management. I. I NTRODUCTION T HE need to reduce the cost and increase the performance of ICs has led to shrinkage of the transistor size and increased transistor packing density immensely. This has not only increased the power dissipation, but also led to formation of localized hotspots. Heat flux at these localized hotspots can be five to ten times higher than the average heat flux dissi- pated across the die [1]. Even though International Technol- ogy Roadmap for Semiconductors (ITRS) predicts sustained power dissipation over the entire die, heat flux dissipated at the hotspot is expected to rise. Due to the presence of hotspots, power dissipation becomes highly nonuniform. This results in large temperature gradient and residual stresses, and further decreases the reliability and life of the device. Moreover, the maximum allowable junction temperature for high-performance devices is projected to drop to 75 °C by 2016 [2], which would reduce the overall thermal budget and make thermal management even more challenging. Effective thermal management of electronics will not only require Manuscript received January 18, 2013; revised May 28, 2013; accepted June 18, 2014. Date of publication December 1, 2014; date of current version January 7, 2015. This work was supported in part by the Interconnect Focus Center through the Focus Center Research Program, and in part by a Semiconductor Research Corporation Program. Recommended for publication by Associate Editor B. Sammakia upon evaluation of reviewers’ comments. V. Sahu, Y. K. Joshi, and A. G. Fedorov are with the George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Austin, GA 31546 USA (e-mail: vivek.sahu@gmail.com; yogendra.joshi@me.gatech.edu; andrei.fedorov@me.gatech.edu). J.-H. Bahk and X. Wang are with the Baskin School of Engineering, University of California at Santa Cruz, Santa Cruz, CA 95064 USA. A. Shakouri is with the Department of Electrical Engineering, Purdue University, West Lafayette, IN 47907 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCPMT.2014.2332516 reduction in hotspot temperature, but also minimization of temperature gradients across the die. Liquid cooling has shown a great promise to dissipate high heat fluxes. Kandlikar et al. [3] have provided a good overview of recent microchannel cooling studies. Tuckerman and Pease [4] were able to remove 790 W/cm 2 using liquid cooled microchannel heat sink at the expense of huge pressure drop (214 kPa) and volumetric flow rate (500 ml/min). Current microscale pump technologies cannot deliver the required flow rate at the pressure drop mentioned above [5]. Colgan et al. [6] used offset strip fin arrangement inside the microchannel and were able to dissipate close to 275 W/cm 2 of heat flux using single phase forced convection with water as the working fluid, while maintaining the junction temperature at 85 °C. They used multiple entries manifold to keep the channel length short and the pressure drop small. Several other studies have been carried out to dissipate high flux using liquid cooled microchannel heat sinks [7]–[9]. Even though liquid cooling is capable of removing high heat flux, pressure drop and volumetric flow rate penalties become severe for heat flux in excess of 100 W/cm 2 . Moreover, since microchannel heat sink provides uniform heat flux dissipation, it has to be designed for the highest heat flux dissipated from the die, which can be several times higher than the average heat flux. This will results in highly overdesigned microchannel heat sink. Furthermore, as microchannel heat sink provides uniform heat flux removal capability, it will not alleviate temperature gradients across the die. Solid-state thermoelectric coolers have been widely used for several Decades; however, due to poor material properties, they have not gained much interest in thermal management community. Solid-state coolers offer significant advantages over other cooling techniques. They are mechanically robust, compact, and capable of reducing the temperature below ambient. However, due to the low coefficient of perfor- mance (COP), they are not suitable for thermal management of the entire chip. Since the total power dissipated from hotspots (usually < 1–2 W) is significantly less than the power dissipated by the entire chip (around 50–100 W), solid- state coolers have been utilized for hotspot cooling. Prasher et al. [10] used a microthermoelectric cooler to provide 15 °C of cooling at 1300 W/cm 2 hotspot heat flux. In their work, microthermoelectric coolers were implemented at the package level between the heat spreader and the thermal interface material (TIM) layer, due to which significant temperature gradients were still present over the die. 2156-3950 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.