978-1-4673-1111-3/12/$31.00 ©2012 IEEE 130 28th IEEE SEMI-THERM Symposium Energy Efficient Liquid-Thermoelectric Hybrid Cooling for Hot-Spot Removal Vivek Sahu 1 , Andrei G Fedorov 1 , Yogendra Joshi 1 Kazuaki Yazawa 2* , Amirkoushyar Ziabari 2 , Ali Shakouri 2,3 1 George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology 2 Baskin School of Engineering, University of California Santa Cruz 1156 High St. M/S SOE2, Santa Cruz, CA 95064, USA 3 Birck Nanotechnology Center, Purdue University *kaz@soe.ucsc.edu Abstract We report a study on a liquid-thermoelectric hybrid cooling that allows a multiple larger heat flux (>600 W/m 2 ) hotspots on a chip that is never achievable with a reasonable pump power for a microchannel with single phase liquid cooling. Thermoelectric effect is realized in this study by embedding to the silicon chip in superlattice microcooler which has been studied in our previous work. We went through an analytic modeling including spreading resistance through the substrate and modeled the fluid dynamic characteristic of microchannel so that we were able to find the pump power and cooling power of superlattice cooler. We also verified the performance with 3D numerical simulation. The results show that the hybrid system allows much higher heat flux for a hotspot while superlattice cooler locates correctly. As an example, if we have a ZT=0.5 material, a 500m x 500m hotspot can be maintained at 85 o C (ambient 35 o C) with around 850W/cm 2 while a simple liquid cooling reaches 620W/cm 2 for the same 12W/cm 2 of overall cooling power. Keywords liquid cooling, superlattice microcooler, hotspot, energy efficient 1. Introduction With continuous growing of electronics for Information Technologies (IT), hot-spots on a chip are getting more serious challenges for thermal management not only due to the advancement of process technologies called ‘More Moore’, but also due to the integration in multiple-chip packages. Making enough thermal paths to the heat sink is getting harder and harder by stacking up chips with interconnect enabling technology Through-Silicon-Via (TSV), while this three dimensional exploring approach is called as ‘More Than Moore’. Pushing the heat sink thermal resistance lower and lower results a significant increasing of required pump power either for air cooling or liquid cooling. Due to the flow resistance nature, the pump power increase as nearly cube to the cooling power. To adapt this cooling requirement with lower flow rate, we propose following hybrid cooling scheme to maintain the maximum junction temperature below 85ºC. 2. Hybrid cooling scheme Figure 1 shows the schematic of the hybrid cooling scheme. Hybrid cooling scheme combines localized solid- state cooling with global liquid cooling to exploit their unique advantages and to overcome the challenges associated with each method [1]. This scheme consists of a microchannel heat sink to remove the background heat flux. Array of superlattice coolers are fabricated at the back of this microchannel heat sink to dissipate the heat from a single or multiple localized hotspot(s). Figure 1: Schematic of hybrid cooling scheme. SLCs underneath the hotspots are activated. Die is above the microchannel heat sink but shown transparent in the schematic to show the superlattice cooler underneath it. Superlattice coolers (SLCs) [2, 3] are solid-state active devices which consist of alternate layers of the epitaxial grow Si and Si/Ge. Each layer is few nanometers thick, and the combined structure is few micrometers thick. Superlattice layer acts as a barrier for electrons flowing from cathode to anode. When electric current is applied to the superlattice, only hot electrons from the cathode, which have sufficient energy to cross the barrier, reach the anode. This creates deficiency of hot electrons in the cathode layer, resulting in cooling at the cathode junction, which is located on the same side as the superlattice cooler. SLCs are silicon micro- fabrication compatible and hence can be directly fabricated on the back of the silicon microchannel heat sink. They are placed at the expected location of hotspots. An array of superlattice coolers can be utilized to manage multiple