162 IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 7, NO. 1, MARCH2007 Design for Reliability: The RF Power LDMOSFET Maria Merlyne De Souza, Member,IEEE, Paolo Fioravanti, Student Member, IEEE, G. Cao, and David Hinchley (InvitedPaper) Abstract—The design of lateral diffused MOSFETs operating under continuous peak power in RF communication applications is one of the most demanding among semiconductor applications. This paper discusses design parameters related to the optimum performance of the transistor and constraints introduced by the fabrication process in achieving them. Nonstandard processing steps include thick pad oxides, a p+ sinker to connect source to the bottom substrate, metal silicided gates, a source shield over the drift region, and often gold metallization for improved electro- migration. Additionally, the device requires careful optimization for control of hot-carrier-related bias drift. The impact of negative charge injection in the gate oxide is to degrade the power gain and at higher output power levels, the linearity. The difficulties in as- sessment of the true impact of hot carriers on these parameters via measurement are highlighted. The contribution of matching im- pedances and class of bias on hot-carrier degradation is extracted via modeling. A “design for reliability” approach for this product is investigated with four designs of the drift region, evaluated in terms of transconductance, on-resistance, breakdown voltage, ca- pacitance, and hot-carrier immunity. A second-generation source shield demonstrates a tradeoff via significant reduction of feed- back capacitance at a cost to transconductance g m . A deep drift design shows optimization in terms of gain without compromise to the hot-carrier immunity. Recent advances made in terms of packaging and electromigration are reviewed. Index Terms—Drift design, gain, hot carriers, linearity, RF power lateral diffused MOS (LDMOS). I. I NTRODUCTION S INCE their introduction in the early 1990s, lateral diffused MOSFETs (LDMOSFETs) have rapidly replaced bipolar transistors as the technology of choice for high frequency broadband mobile communications applications. The main re- quirement of the power transistor, which lies at the heart of the base-station transmitters of modern-day communication net- works, is high gain/efficiency at low cost per watt. Additionally, high linearity is essential to accommodate a constant increase in the number of mobile telephone users. LDMOS technology evolved to meet these stringent requirements due to several ad- vantages: LDMOS works on a single supply voltage (26–32 V), has a simpler drive circuitry, inherently higher linearity in comparison to the bipolar transistor, and does not suffer from Manuscript received May 16, 2006; revised October 12, 2006. M. M. De Souza, P. Fioravanti, and G. Cao are with the Emerging Tech- nologies Research Centre, De Montfort University, LE1 9BH Leicester, U.K. (e-mail: mms@dmu.ac.uk). D. Hinchley is with the Semelab Plc, LE17 4JB Lutterworth, U.K. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TDMR.2006.889265 current filamentation due to positive temperature coefficient of resistance. Moreover, unlike its vertical counterpart—the vertical DMOS (VDMOS)—the LDMOS is not limited to low frequencies by the inductance of the source wire required to connect the source terminal of the device to the package ground. LDMOSFETs are essentially derivatives of power MOSFETs with specific modifications to achieve continuous peak power operation at high frequencies. The thermal density in the ac- tive area of the device lies in the range of 3 × 10 7 W/m 2 ; in comparison, the thermal flux at the surface of the sun is 6.6 × 10 7 W/m 2 [1]. The thermal flux in the active region of the base-station RF power amplifier (PA) is one of the highest among semiconductor devices, presenting formidable challenges to its reliable operation and design. This paper discusses a design-for-reliability approach for optimization of the performance of the RF LDMOSFET. In Section I, constraints introduced by the demands of per- formance from the structure on its fabrication process are described. These parameters intrinsically introduce several tradeoffs with respect to each other. Section II begins with an explanation of some of the difficulties associated with the experimental determination of accelerated ageing factors for RF power devices. The device reliability is discussed in terms of three aspects: hot carriers, packaging, and electromigration. The physics of degradation due to hot-carrier injection and its impact on power gain and linearity is evaluated. Drift-region engineering with a particular emphasis on design for reliability is carried out for four designs, keeping process conditions identical for all structures. In Section III, the conclusions are drawn. Unless stated otherwise, all structures and their behavior pre- sented in this paper are simulated using TSUPREM4/MEDICI [2]. The defined gate length is 0.8 μm. The sidewall of the polysilicon gate is oxidized, resulting in a graded gate oxide that is 60 nm in the center and 110 nm at the edges of the polysilicon. Such a process has been shown to reduce the feedback capacitance of the device [3]. As a result, the final channel length is 0.7 μm. A. Structure and Fabrication of the RF LDMOSFET An RF LDMOSFET, as shown in Fig. 1, is similar to its low-voltage counterpart, except for the presence of a lightly doped n - drift region inserted between the gate and the drain to sustain the desired breakdown voltage. This voltage is ap- proximately required to be 2.5–3 times the supply voltage to withstand output mismatch conditions (especially during 1530-4388/$25.00 © 2007 IEEE