Comput & Graphics Vol. 7. No. 3-4, pp. 333-347. 1983 0(}97 8493/83 $3.00 + .00 Printed in Great Britain. i 1983 Pergamon Press Ltd. Technical Section IMPLEMENTATION OF PLACEMENT AND ROUTING ALGORITHMS FOR COMPUTER AIDED DESIGN OF PRINTED CIRCUIT BOARDS L. M. PATNAIK School of Automation, Indian Institute of Science, Bangalore 560012. India B. A. GADKARI Tata Burroughs Ltd., Bombay, India and L. RAMAKRISHNAN Processor Systems India Ltd., Bangalore, India (Received 15 February 1983) Abstract--The Printed Circuit Board (PCB) layout design is one of the most important and time consuming phases during equipment design process in all electronic industries. This paper is concerned with the development and implementation of a computer aided PCB design package. A set of programs which operate on a description of the circuit supplied by the user in the form of a data file and subsequently design the layout of a double-sided PCB has been developed. The algorithms used for the design of the PCB optimise the board area and the length of copper tracks used for the interconnections. The output of the package is the layout drawing of the PCB, drawn on a CALCOMP hard copy plotter and a Tektronix 4012 storage graphics display terminal. The routing density (the board area required for one component) achieved by this package is typically 0.8 sq. inch per IC. The package is implemented on a DEC 1090 system in Pascal and FORTRAN and SIGN(l) graphics package is used for display generation. 1. INTRODUCTION In the design of present day large scale electronic systems, high density packaging is achieved by proper design and interconnection of its subsystems. The de- sign involves placement of components and inter- connections at three different levels. At the lowest level, logic elements are to be placed and routed on a semiconductor wafer. A PCB is used at the second level with ICs instead of logic elements. Set of PCBs form the backplane, which is the third level of the layout problem. We discuss the second level of the design process in this paper. The magnitude and complexity of the PCB design problem is too large to solve en mass. Thus attempts are made to divide the problem into distinct phases which are individually handled. The logic diagram of a particular digital system is assumed to be available in the form of design diagrams. An independent physical logic element is considered as a "module" and each module has several "pins" which are to be connected electrically. Each such connection is said to form a "signal net". A collection of such signal nets de- scribing a complete layout is called a "net list". Other descriptions given include information about I/O con- nectors, power lines, special signal nets etc. The indi- vidual components are to be given physical locations on the board surface so that the electrical connections between them can be done. Again the positioning of the components can be done to optimize certain char- acteristics of the layout such as the total wire length, board area, etc. A placement problem is said to be solved, if such an optimum physical positioning is achieved for all the components. Having assigned physical locations to electrical pins to be connected, the actual physical laying of conductor patterns is to be attempted. This problem is referred to as the rou- ting problem. The interconnections must be obtained satisfying certain physical constraints. For example, the number of conductor patterns per unit area is limited by available technology. Also, the number of tracks per unit area must be uniform throughout the board. Problems of practical dimensions require more than one layer of conductor patterns and hence multi- layer boards are to be routed. The connection between the different layers is achieved by "plated through holes" (PTH), also called "vias". Output from the routing phase is to be converted to usable data (e.g. suitable for graphic display). The actual routing pat- terns are displayed on a graphics terminal to a suitable scale. The final output can be taken on a plotter which can be used for photomask preparation. 2. THE PLACEMENT PROBLEM Prior to the actual intereonnection, the individual components are to be placed at appropriate locations on the board such that the interconnection can be done easily. We call the components to be placed as "modules", and their assigned locations on the board as "slots". The modules contain connection pins on the sides. On the basis of a given interconnection, 333