A Scalable Multiprocessor Architecture for Pervasive Computing Long Zheng 1, 2 , Yanchao Lu 3 , Jingyu Zhou 3,⋆ , Minyi Guo 3 , Hai Jin 1 , Song Guo 2 , Yao Shen 3 , Jiehan Zhou 4 , and Jukka Riekki 4 1 Huazhong University of Science and Technology, Wuhan, 430074, China 2 The University of Aizu, Aizu-wakamatsu, 965-8580, Japan 3 Shanghai Jiao Tong University, Shanghai, 200240, China 4 University of Oulu, FIN-90014 Oulu, Finland zhou-jy@cs.sjtu.edu.cn Abstract. In a case study of a pervasive computing system, we have implemented a system for a JPEG encoding application. The previous system uses static deployment of computing resources, which limits com- putation capability.To address this limitation, this paper proposes a novel scalable architecture that allows extending a system by adding new sub- systems, to meet increasing computation requirements. The novel archi- tecture allows several subsystems to share their Resource Routers (RRs) and Processing Elements (PEs) to improve the efficiency of PEs by intro- ducing a Share Degree (SD) mechanism. Experimental results show that when SD is equal to three, the system achieves the highest performance. Keywords: ubiquitous multiprocessor, computing resource allocation, scalable. 1 Introduction Olympus Future Creation Laboratory and University of Aizu have conducted a collaborative research on developing a general framework for the coming ubiq- uitous society, where a ubiquitous computing scenario named Ubiquitous Multi- Processor (UMP) that consists of many heterogeneous processing nodes has been extensively studied. A basic framework of multiprocessor simulation system has been implemented based on a multi-way cluster [7] and a double-buffered com- munication model [6] has been incorporated into the system that can improve the performance over 50%. M. Kubo et al. extends the system and implements a ubiquitous multi-processor network-based pipeline processing framework at the hardware simulation level to support the development of high performance pervasive applications [5]. Our previous work [2,1,3] did not consider the extensibility of the system, thus limiting computation capacity, because only one Resource Router (RR) man- ages all Processing Elements (PEs), which becomes a bottleneck during high ⋆ Corresponding author. J. Riekki, M. Ylianttila, and M. Guo (Eds.): GPC 2011, LNCS 6646, pp. 42–51, 2011. c  Springer-Verlag Berlin Heidelberg 2011