IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 7, JULY 2005 1451 A Silicon Bipolar Transmitter Front-End for 802.11a and HIPERLAN2 Wireless LANs Alessandro Italia, Student Member, IEEE, Luca La Paglia, Antonino Scuderi, Francesco Carrara, Member, IEEE, Egidio Ragonese, Member, IEEE, and Giuseppe Palmisano Abstract—A 5-GHz transmitter front-end for 802.11a and HIPERLAN2 wireless local area networks was implemented in a low-cost 46-GHz- silicon bipolar technology. The transmitter includes a digitally controlled linear-in-dB variable-gain up-con- verter and a three-stage linear power amplifier. At a 3-V supply voltage, the front-end exhibits a 23.5-dBm output 1-dB compres- sion point, 35-dB maximum power gain, and 30-dB dynamic range. The dB-linear gain error is lower than 0.8 dB. The trans- mitter is able to comply with the stringent error vector magnitude requirement of the standard up to a 19-dBm output power level. Index Terms—HIPERLAN2, orthogonal frequency division multiplexing (OFDM), radio transmitter, silicon bipolar tech- nology, wireless local area network (WLAN), 802.11a. I. INTRODUCTION T HE growing demand for high throughput in wireless local area networks (WLANs) has generated increasing interest in the IEEE 802.11a [1] and ETSI HIPERLAN2 [2] standards. These protocols provide data rates up to 54 Mb/s using a 20-MHz channel bandwidth in the 5-GHz unlicensed national information infrastructure (UNII) band. The data stream is mapped into an orthogonal frequency division multiplexing (OFDM) signal consisting of 52 subcarriers, each subcarrier being either BPSK, QPSK, 16QAM, or 64QAM modulated. OFDM systems achieve high spectral efficiency along with very low inter-symbol interference and good multipath fading immunity. However, these benefits come at the expense of a very high peak-to-average ratio for the modulated signal, which re- sults in a stringent linearity requirement for the wireless trans- mitter. Several silicon-based WLAN transceivers have been reported in the last years [3]–[10]. Despite recent efforts, output power levels in excess of 20 mW have not yet been demonstrated for pure-silicon transmitters complying with the standard specifica- tion for the modulation accuracy, i.e., with a lower than 25 dB error vector magnitude (EVM). Therefore, reported transmit- ters call for a linear power amplifier (PA) to provide the re- quired output power level at the antenna connector. The market of PAs for 5-GHz WLANs is currently dominated by state-of- Manuscript received November 15, 2004; revised January 27, 2005. This work was supported by the European Commission under the Fifth Framework Programme (IST-2000-30132 project PERLA). A. Italia, F. Carrara, E. Ragonese, and G. Palmisano are with the Diparti- mento di Ingegneria Elettrica Elettronica e dei Sistemi, Facoltà di Ingegneria, Università di Catania, Catania I-95125, Italy (e-mail: aitalia@diees.unict.it; fcarrara@diees.unict.it; eragonese@diees.unict.it; gpalmisano@diees.unict.it). L. La Paglia and A. Scuderi are with STMicroelectronics s.r.l., Catania I-95121, Italy (e-mail: luca.la-paglia@st.com; antonino.scuderi@st.com). Digital Object Identifier 10.1109/JSSC.2005.847327 TABLE I HSB3 TYPICAL PERFORMANCE PARAMETERS the-art GaAs [11] or SiGe [12] fabrication technologies. How- ever, the drawback with these devices is an increased produc- tion cost. Well-established silicon-based technologies provide a cost-competitive alternative for high-volume production. More- over, silicon has inherent advantages over compound semicon- ductors when high levels of integration are required. For these reasons, the prospect of a pure-silicon transceiver has been at- tracting increasing attention over recent years [13]. This paper presents the design and measured performance of a transmitter front-end for 802.11a and HIPERLAN2 WLAN systems [14], [15]. The front-end was fabricated using a low- cost pure-silicon bipolar process and includes both a variable- gain up-converter and a linear PA. Measurement results outper- form previously reported performance in terms of linear output power level, thus advancing the state-of-the-art for 5-GHz sil- icon-based linear transmitters. Section II provides an overview of the fabrication process. The proposed transmitter is presented in Section III, which gives a detailed description of the circuit topology and basic opera- tion. Finally, measured performance is presented in Section IV. II. FABRICATION TECHNOLOGY The circuits were fabricated using a 46-GHz- double-poly 0.8- m self-aligned-emitter silicon bipolar process (HSB3) [16]. This is a low-cost technology which requires only 17 mask steps. It features oxide trench isolation, three metal layers, poly resistors, lateral p-n-p transistors, and metal–insulator–metal (MIM) capacitors with 0.7 fF/ m . The main performance parameters of the HSB3 process are summarized in Table I. Fig. 1 shows a SEM cross section of a bipolar transistor with 0.8- m emitter mask size. The metal layer stack for the HSB3 process is outlined in Fig. 2. On-chip spiral inductors 0018-9200/$20.00 © 2005 IEEE