Int. J. High Performance Systems Architecture, Vol. 3, Nos. 2/3, 2011 167 Copyright © 2011 Inderscience Enterprises Ltd. A hardware architecture for subtractive clustering Marcos Santana Farias* Rua Hélio de Almeida, 75, Cidade Universitária – Ilha do Fundão, Rio de Janeiro, RJ, CEP: 21941-906, Brazil E-mail: msantana@ien.gov.br *Corresponding author Nadia Nedjah and Luiza de Macedo Mourelle Rua São Francisco Xavier, 524, Sala 5145-F, Maracanã, Rio de Janeiro, RJ, CEP: 20550-900, Brazil E-mail: nadia@eng.uerj.br E-mail: ldmm@eng.uerj.br Abstract: Clustering algorithms are used extensively to organise and categorise abundant data. This paper describes the implementation of subtractive clustering algorithm in hardware. The solution developed in this paper seeks a hardware implementation to automatic and fast identification of cluster centres. This hardware proposed is generic so it can be used in any data classification problems, omnipresent in identification systems. Keywords: subtractive clustering; SC; reconfigurable hardware; data classification. Reference to this paper should be made as follows: Farias, M.S., Nedjah, N. and de Macedo Mourelle, L. (2011) ‘A hardware architecture for subtractive clustering’, Int. J. High Performance Systems Architecture, Vol. 3, Nos. 2/3, pp.167–173. Biographical notes: Marcos Santana Farias is a graduate student. He received his Engineering degree in Electronics. He is pursuing his Master in Electronics Engineering and his interests are in architectures for embedded systems in particular and for intelligent systems in general. Nadia Nedjah is an Associate Professor in the Department of Electronics Engineering and Telecommunications at the Faculty of Engineering, State University of Rio de Janeiro, Brazil. Her research interests include functional programming, embedded systems and reconfigurable hardware design as well as cryptography. She received her PhD in Computation from the University of Manchester – Institute of Science and Technology (UMIST), England, MSc in System Engineering and Computation from the University of Annaba, Algeria and Engineering degree in Computer Science also from the same university. Luiza de Macedo Mourelle is an Associate Professor in the Department of System Engineering and Computation at the Faculty of Engineering, State University of Rio de Janeiro, Brazil. Her research interests include computer architecture, embedded systems design, hardware/software co-design and reconfigurable hardware. She received her PhD in Computation from the University of Manchester – Institute of Science and Technology (UMIST), England, MSc in System Engineering and Computation from the Federal University of Rio de Janeiro (UFRJ), Brazil and Engineering degree in Electronics also from UFRJ, Brazil. 1 Introduction The goal of data clustering is to divide the dataset in such a way that objects belonging to the same cluster are as similar as possible to each other, with respect to some characteristics. Clustering algorithms consist of an unsupervised learning task that aims at categorising a given set of objects into subgroups. As will be explained late in this paper, our intention is to run the clustering algorithms in a portable equipment for data classification. The clustering algorithms consume high processing time when implemented in software, mainly on processors of portable use, such as micro-controllers. Thus, a custom implementation suitable for reconfigurable hardware is a good choice in embedded systems, which require real-time execution as well as low power consumption.