Abstract—The United States National Institute of Standards and Technology (NIST) created an open competition to find a new standard for cryptographic hashing in 2007. The competition was composed of a number of rounds that ended with 5 finalists (BLAKE, Grostl, JH, Keccak, Skein) in December of 2010. This research paper will examine the power consumption of the 5 finalists on the Xilinx Spartan3E FPGA. The results in this paper will allow developers examining including a hash function in a hardware design to have a full understanding of the power requirements and aid the developer in making an inform decision. The results show that the Keccak algorithm has the best tradeoff of power to speed and the BLAKE algorithm is the best choice for low power design. Index Terms—FPGA, hashing, power analysis, SHA-3. I. INTRODUCTION The United States National Institute of Standards and Technology (NIST) has standardized security algorithms for the United States. Examples of algorithms the NIST has standardized include DES, Skipjack, AES, SHA-1, SHA-2, DSA, and RSA. These algorithms are not only used by contractor conducting business with the United States government but are the de facto standard in the technology field. The state of the art cryptographic hashing function SHA-2 created in 2001 was reaching the end of its approved lifecycle and the NIST set forth to create a new standard for adoption in 2012. The new standard would be known as SHA-3. In order for SHA-3 to be the most cryptographic secure hashing algorithm available the NIST created a NIST hash function competition [1]. The competition started in 2007 and was narrowed down to five finalist (BLAKE, Grostl, JH, Keccak, and Skein) in December 2010. The competition ended in October of 2012 with the selection of Keccak as the winner of the competition. While Keccak was selected as the SHA-3 algorithm all five finalist will continue to be used in many application. The NIST competition chose the winner based on the following important factors: performance, security, analysis, and diversity. This paper focuses on examining the performance of all five finalists. Performance is no longer a measurement of only execution time. Power has become as important or more important than speed in many computer domains, especially mobile and embedded systems. This paper examines the performance in terms of power Manuscript received December 15, 2012; revised February 22, 2013. A. Jaffar and C. Martinez are with the University of New Haven, West Haven, CT 06516 USA (e-mail: ajaff1@unh.newhaven.edu; cmartinez@newhaven.edu). consumption of all the finalists on the Xilinx FPGA platform. The Xilinx FPGA chip Spartan3E was used in this research project. This paper is meant to be a guide for researchers and developers in understanding the power consumption of the five hashing algorithms with a comparison to power also provided. Developers in the field will be able to use this information to aid in the planning stage of devices that require hashing algorithm. Developers will be able to use our information to determine which algorithms would work with their power budget for a design. The work will allow researchers to have a baseline for power consumption and examine new ways to reduce power in future designs. II. SHA-3 FINALIST A. BLAKE The BLAKE algorithm is created by the team of Jean-Philippe Aumasson, Luca Henzen, Willi Meire and Raphael Phan [2]. The BLAKE algorithm is an adaptation of the ChaCha stream cipher and can produce message digests of 224-bits, 256-bits, 384-bit, and 512-bits. The BLAKE algorithm is composed of a ChaCha function that performs transformations on 4 words. The transformation involved an XOR and bit rotation leading to a fast implementation. A total of 10 to 14 rounds of ChaCha functions are used depending on the size of the message digests required. B. Grostel The Grostl algorithm is created by the team from Technical University of Denmark and TU Graz [3]. The Grostel algorithm borrows elements from the AES cipher algorithm. The Grostel algorithm has high throughput since many optimization for AES have been done in software and hardware over the years. Grostl uses the AES S-box function and similar permutation functions. C. JH The JH algorithm was created by Hongjun Wu [4]. The JH algorithm is inspired by the AES and Serpent cipher algorithms and is made up of 42 rounds of execution. Each of the 42 rounds consists of four S-boxes and MDS transformations. D. Keccak The Keccak algorithm was the winner of the SHA-3 competition. The Keccak function is created using a number of sponge functions [5]. The Keccak sponge function is made up of seven permutation functions of different bit lengths. The seven permutation functions are then used in XOR and Detail Power Analysis of the SHA-3 Hashing Algorithm Candidates on Xilinx Spartan-3E Amar Jaffar and Christopher J. Martinez 410 International Journal of Computer and Electrical Engineering, Vol. 5, No. 4, August 2013 DOI: 10.7763/IJCEE.2013.V5.742