Indian Journal of Science and Technology Vol. 4 No.11 (Nov 2011) ISSN: 0974- 6846 Research article “Digital fuzzifier” M.Daneshwar et al. Indian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol. 1396 Generating of digital fuzzifier with high resolution, high speed and low area ADC M. Daneshwar 1 , NorlailiMohd Noh 2 , S.Aminifar 1 and Gh.Yosefi 1 1 Department of Electrical and Electronic Engineering, Mahabad Branch, Islamic Azad University, Mahabad, West Azarbayjan 591393-3137, Iran 2 Department of Electrical and Electronic Engineering, Engineering Campus, Universiti Sains Malaysia, 14300 NibongTebal, Pulau Pinang, Malaysia mdaneshwar@yahoo.com; m.daneshwar@urmia.ac.ir Abstract This paper proposes a digital fuzzifier with 7 bit resolution. To achieve a high performance, the A/D conversion and fuzzification operation are done simultaneously on the same functional block, through a programmable membership function. To implement the idea we have used flash method for the 4 LSBs which results in high speed conversion. Although the 4 bit converting is adequate for most practical applications, we take advantage from successive approximation technique to achieve better precision, if needed. The proposed converter allows a significant amount of silicon area to be saved compared to fully parallel A/D. Result of extracting of the 7 bit A/D converter shows that the size of converter’s layout is less than 0.02 mm 2 in 0.35μm CMOS standard technology. Moreover, the Hspice simulation showed that it can achieve 25 MHz speed and total power dissipation is 5mw in the aforementioned technology. Keywords: Analog-to-digital converter, current mode, fuzzifier, thermometer, successive approximation Introduction Fuzzy controllers can be implemented with analog (Hamed Peyravi et al., 2002; Dinavari et al., 2009; Guo et al., 2009), digital (Patyra et al.,1996; Sánchez Solano et al., 1997; Aminifaret al., 2006; Bryk & Wielgus, 2010) and mixed-mode (Bouras et al., 1998; Saavedra et al., 1999; Amirkhanzadeh et al., 2005; GhYosefi et al., 2011) hardware. A key element in the design of a high speed fuzzy processor is the availability of a high speed fuzzifier to allow maximum processor speed. Analog fuzzifiers (or membership function circuits) with fully independent, electronically and continuously adjustable characteristics have been reported that allow high speed fuzzification, but they do not interface easily with digital systems. However, not, much has been said about the design of digital fuzzifiers (Chien et al., 1995; Gianluca et al., 2002). The digital systems, whose data have capable saving and keeping, support other digital environments and its digital signals are much robust against noise and distortions. In application of fuzzy controllers, using external converters causes to reduce the quality and increases more hardware and complexity. In this paper the A/D conversion and fuzzification operation are done simultaneously on the same functional block, through a programmable membership function, which is suitable for fuzzy control systems. Moreover, the conventional A/D converter architectures for fuzzy controllers have low speed in successive approximation method (Gianluca et al., 2002). The other method of conversion of data that uses parallel method has a high speed with increased chip die (Baturone et al., 2000; Ivano et al., 2007; Yuan et al., 2007). In this article we have used both parallel and serial techniques of data Conversion. The proposed converter uses improved Flash Circuit for 4 bits of LSB which is always appropriate for fuzzy controller, and for 3 bits of MSB we proposed an improved circuit based on successive approximation technique that provides a current mode A/D converter. It causes that proposed converter has a suitable speed, low chip size and high resolution for fuzzy controller. In following sections, we describe the architecture of 4 bit flash which is improved compare to previous circuits and 3bit of successive approximation method and composition. We apply proposed converter to fuzzifier and report some simulation results which are in excellent agreement with the theoretical ones. Fig.1. Current-Mode FLASH A/D Architecture