Causal modelling of semiconductor fabrication Reid Simmons Artificial Intelligence Laboratory, MIT, Cambridge, MA 02139, USA John Mohammed Schlumberger Palo Alto Research, 3340 Hillview Avenue, Palo Alto, CA 94304, USA Semiconductor fabrication is the manufacturing process by which wafers of silicon are turned into integrated circuits. Reasoning about how wafers are affected by fabrication operations is an important aspect in getting computers to aid in the diagnosis of manufacturing faults and in the design of new fabrication processes. Our research has been aimed at characterizing the knowledge needed to construct qualitative, causal models that can support diagnosis and design of the processes by which semiconductors are manufactured. This article presents our models of wafer structure and the operations that are used in semiconductor fabrication, and describes how a domain-independent simulator uses these models to determine how the operations affect the wafer structure. We also demonstrate how the causal dependencies recorded by the simulator can be used to diagnose manufacturing faults. We conclude with a comparison of our method of using discrete, causal models to other methods of modelling semiconductor fabrication. 1. INTRODUCTION Semiconductor fabrication is the long and complex manufacturing process by which wafers of almost pure crystalline silicon are turned into integrated circuits. It is carried out according to a recipe, a linear sequence of parameterized operations, such as etching and diffusion, that defines how to create devices belonging to a particular technological family, such as bipolar or CMOS. Some of the tasks encountered by process engineers in this domain are designing new recipes and diagnosing faults in the manufacturing process. To accomplish these tasks, one needs to reason about how the steps in the recipe affect the structure of the wafer produced. For example, if one wants to change the current recipe in order to enlarge the collector of a transistor, one has to know which step(s) affected the collector region and how changing the parameters of those steps, such as increasing the temperature, will affect the thickness of the collector region. This article discusses a model-based approach to reasoning about semiconductor fabrication which involves qualitatively representing the structure of the wafer and explicitly representing the effects of operations on the wafer structure. In order to be generally useful, we want models that are detailed enough to yield what process engineers consider to be 'commonsense' inferences and explanations, yet not so detailed as to be computationally infeasible to reason about. In addition, we want the models to be recipe independent so that we can use the same models to represent recipes from different technologies, such as bipolar or CMOS. The main result of the research described in this article Paper receivedSeptember 1987. Discussion ends July 1989. © Computational Mechanics Publications 1989 2 Artificial Intelligence in Engineering, 1989, Vol. 4, No. 1 is the elucidation of the knowledge needed to represent the wafer structure and fabrication processes in order to achieve the above criteria. We have found it to be a major undertaking to represent accurately an understanding, even at a fairly abstract level, of how semiconductor fabrication processes work. We believe that the models constructed will prove useful in understanding semiconductor fabrication despite the simplifying assumptions we made, many of which are described in this article. The primary inference engine using these models is a domain-independent simulator. The simulator produces a qualitative description of the wafer structure and records all the causal dependencies that relate the process steps of the recipe to attributes of the wafer. These dependencies form the basis for qualitative, causal explanations which are, in turn, very important in doing diagnosis and design. To illustrate both the utility and range of applicability of our models, we also implemented a small diagnostic system that uses the causal explanations produced by the simulator to reason about faults in the manufacturing process. We conclude that qualitative explanations, while helpful in narrowing down potential causes of faults, are too abstract to pinpoint the cause sufficiently to be commercially useful by themselves. The last part of this article describes other efforts aimed at representing semiconductor fabrication processes and discusses how these representations could be integrated with our approach to overcome some of its limitations. 2. OVERVIEW Semiconductor devices such as transistors and resistors are created by selectively processing areas of a silicon wafer. These devices are often depicted as two-