Citation: Ni¸ sancı, G.; Flikkema, P.G.; Yalçın, T. Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms. Cryptography 2022, 6, 41. https://doi.org/10.3390/ cryptography6030041 Received: 17 June 2022 Accepted: 30 July 2022 Published: 10 August 2022 Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affil- iations. Copyright: © 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/). cryptography Review Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms Görkem Ni¸ sancı 1, *, Paul G. Flikkema 2 and Tolga Yalçın 3 1 Intel Corporation, Chandler, AZ 85226, USA 2 School of Informatics, Computing and Cyber Systems, Northern Arizona University, Flagstaff, AZ 86011, USA 3 Google LLC, San Diego, CA 92121, USA * Correspondence: gorkem.nishandji@intel.com Abstract: The ever-increasing need for securing computing systems using cryptographic algorithms is spurring interest in the efficient implementation of common algorithms. While the algorithms can be implemented in software using base instruction sets, there is considerable potential to reduce memory cost and improve speed using specialized instructions and associated hardware. However, there is a need to assess the benefits and costs of software implementations and new instructions that implement key cryptographic algorithms in fewer cycles. The primary aim of this paper is to improve the understanding of the performance and cost of implementing cryptographic algorithms for the RISC-V instruction set architecture (ISA) in two cases: software implementations of the algorithms using the rv32i instruction set and using cryptographic instructions supported by dedicated hardware in additional functional units. For both cases, we describe a RISC-V processor with cryptography hardware extensions and hand-optimized RISC-V assembly language implementations of eleven cryptographic algorithms. Compared to implementations with only the rv32i instruction set, im- plementations with the cryptography set extension provide a 1.5× to 8.6× faster execution speed and 1.2× to 5.8× less program memory for five of the eleven algorithms. Based on our performance analyses, a new instruction is proposed to increase the implementation efficiency of the algorithms. Keywords: RISC-V; cryptography; ISA 1. Introduction The ever-increasing need for securing computing systems using cryptographic algo- rithms is spurring interest in the efficient implementation of common algorithms. While the algorithms can be implemented in software using the base instruction set of processors, there is considerable potential to reduce memory cost and improve speed using specialized instructions and associated hardware. However, there is a need to assess the relative benefits and costs of software implementations and new instructions that implement key cryptographic algorithms in fewer cycles. With the growing popularity of the extensible RISC-V ISA, there is a need to improve the understanding of the cost of implementing cryptographic algorithms for both implementations of the algorithms in software using the rv32i instruction set and with the implementation of instructions as hardware in additional functional units. RISC-V is an open-source RISC ISA, which was developed starting in 2010 at UC- Berkeley [1]. In 2011, the team published Volume 1 of the RISC-V ISA manual [2]. In 2015, the RISC-V International Foundation [3] was founded to build a RISC-V ISA community. RISC-V has 32-bit and 64-bit versions, and currently, it has eight ratified instruction set extensions (-M, -A, -F, -D, -Q, -C, -Zicsr, -Zifencei) and the base instruction set (-I) [4]. However, there are several upcoming extensions. One of these upcoming extensions is the RISC-V cryptography extension (-crypto), which has two sets of instructions—Scalar & Entropy Source [5] and Vector [6]. The Cryptography 2022, 6, 41. https://doi.org/10.3390/cryptography6030041 https://www.mdpi.com/journal/cryptography